From 02353e9ae4a94e9aefb42dfe4ec2734061012dbb Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 6 Dec 2022 23:03:52 +0000 Subject: [PATCH] fel: add support for Allwinner A133 The Allwinner A133 is a slightly older SoC (around 2020) with four Cortex-A53 cores, sharing many treats with the H6. The A100 and R818 are reportedly the same chip, just in different bins or packaging. The chip has only 16K of SRAM-A1, but this is immediately followed by 128K of SRAM-C, with later 64K of SRAM-A2, after some gap. The BootROM SRAM usage is similar to other SoCs: there is the IRQ stack growing down from a 5K offset in SRAM A1, and probably some buffers located towards the end of SRAM C. We can use the area just before those buffers for the IRQ stack backup, which gives us a nice contiguous 128K SRAM area for any payloads. This setup is known to boot the WIP mainline U-Boot setup, including some placeholder TF-A port for now. SPL execution, including returning back to the BROM, works, also the 64-bit switch, as well as the SID dump. Signed-off-by: Andre Przywara --- soc_info.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/soc_info.c b/soc_info.c index 45485b5..4cb6bcc 100644 --- a/soc_info.c +++ b/soc_info.c @@ -151,6 +151,11 @@ sram_swap_buffers h616_sram_swap_buffers[] = { { .size = 0 } /* End of the table */ }; +sram_swap_buffers a133_sram_swap_buffers[] = { + { .buf1 = 0x21000, .buf2 = 0x40000, .size = 0x400 }, + { .size = 0 } /* End of the table */ +}; + /* * R329 has no SRAM A1, but a huge SRAM A2 at 0x100000. SPL and BROM uses * this SRAM A2's first part like how other SoCs use SRAM A1. The sp and @@ -623,6 +628,20 @@ soc_info_t soc_info_table[] = { .rvbar_reg = 0x08000040, .icache_fix = true, .watchdog = &wd_a523_compat, + },{ + .soc_id = 0x1855, /* Allwinner A133 */ + .name = "A133", + .spl_addr = 0x20000, + .scratch_addr = 0x21000, + .thunk_addr = 0x40400, .thunk_size = 0x200, + .swap_buffers = a133_sram_swap_buffers, + .sram_size = 148 * 1024, + .sid_base = 0x03006000, + .sid_offset = 0x200, + .sid_sections = generic_2k_sid_maps, + .rvbar_reg = 0x08100040, + .needs_smc_workaround_if_zero_word_at_addr = 0x100004, + .watchdog = &wd_h6_compat, },{ .swap_buffers = NULL /* End of the table */ }