add V536 SoC support
HW very similar to V831, for the purpose of fel practically identical
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parent
74273b671a
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458a2c6d25
@ -122,6 +122,7 @@ static uint32_t gpio_base(feldev_handle *dev)
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{
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soc_info_t *soc_info = dev->soc_info;
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switch (soc_info->soc_id) {
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case 0x1816: /* V536 */
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case 0x1817: /* V831 */
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case 0x1728: /* H6 */
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case 0x1823: /* H616 */
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@ -140,6 +141,7 @@ static uint32_t spi_base(feldev_handle *dev)
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case 0x1651: /* A20 */
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case 0x1701: /* R40 */
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return 0x01C05000;
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case 0x1816: /* V536 */
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case 0x1817: /* V831 */
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case 0x1728: /* H6 */
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case 0x1823: /* H616 */
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@ -181,6 +183,7 @@ static bool soc_is_h6_style(feldev_handle *dev)
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{
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soc_info_t *soc_info = dev->soc_info;
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switch (soc_info->soc_id) {
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case 0x1816: /* V536 */
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case 0x1817: /* V831 */
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case 0x1728: /* H6 */
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case 0x1823: /* H616 */
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@ -228,6 +231,7 @@ static bool spi0_init(feldev_handle *dev)
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gpio_set_cfgpin(dev, PC, 2, SUN50I_GPC_SPI0);
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gpio_set_cfgpin(dev, PC, 3, SUN50I_GPC_SPI0);
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break;
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case 0x1816: /* Allwinner V536 */
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case 0x1817: /* Allwinner V831 */
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gpio_set_cfgpin(dev, PC, 1, SUN50I_GPC_SPI0); /* SPI0-CS */
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/* fall-through */
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11
soc_info.c
11
soc_info.c
@ -307,6 +307,17 @@ soc_info_t soc_info_table[] = {
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/* Check L.NOP in the OpenRISC reset vector */
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.needs_smc_workaround_if_zero_word_at_addr = 0x100004,
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.watchdog = &wd_h6_compat,
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},{
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.soc_id = 0x1816, /* Allwinner V536 */
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.name = "V536",
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.spl_addr = 0x20000,
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.scratch_addr = 0x21000,
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.thunk_addr = 0x2A200, .thunk_size = 0x200,
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.swap_buffers = v831_sram_swap_buffers,
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.sram_size = 228 * 1024,
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.sid_base = 0x03006000,
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.sid_offset = 0x200,
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.watchdog = &wd_h6_compat,
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},{
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.soc_id = 0x1817, /* Allwinner V831 */
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.name = "V831",
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