thunks: Add assembly sources for some more thunks
These might be useful in case the code requires maintenance/changes. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
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@ -3,7 +3,10 @@
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#
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SPL_THUNK := fel-to-spl-thunk.h
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THUNKS := sid_read_root.h
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THUNKS := memcpy.h
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THUNKS += readl_writel.h
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THUNKS += rmr-thunk.h
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THUNKS += sid_read_root.h
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all: $(SPL_THUNK) $(THUNKS)
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# clean up object files afterwards
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70
thunks/memcpy.S
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70
thunks/memcpy.S
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@ -0,0 +1,70 @@
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/*
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* copy "upwards", increasing destination and source addresses
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*/
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fel_memcpy_up:
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ldr r0, 1f /* dst_addr */
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ldr r1, 2f /* src_addr */
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ldr r2, 3f /* bytes */
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sub r3, r1, r0
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tst r3, #3 /* test LSB for word alignment */
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bne copyup_tail /* unaligned access, copy byte-wise */
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copyup_head:
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tst r1, #3 /* word boundary? */
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beq copyup_loop
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ldrb r3, [r1], #1 /* load and post-inc */
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strb r3, [r0], #1 /* store and post-inc */
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subs r2, #1 /* r2 -= 1 */
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bpl copyup_head
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bx lr /* early return on small byte count (r2 < 0) */
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copyup_loop:
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subs r2, #4 /* r2 -= 4 */
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ldrpl r3, [r1], #4 /* load and post-inc */
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strpl r3, [r0], #4 /* store and post-inc */
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bpl copyup_loop /* while (r2 >= 0) */
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add r2, #4 /* r2 = remaining byte count */
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copyup_tail:
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subs r2, #1 /* r2 -= 1 */
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bxmi lr /* return on (r2 < 0) */
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ldrb r3, [r1], #1 /* load and post-inc */
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strb r3, [r0], #1 /* store and post-inc */
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b copyup_tail
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1: .word 0 /* dst_addr */
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2: .word 0 /* src_addr */
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3: .word 0 /* bytes */
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/*
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* copy "downwards", using base-relative indexing
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*/
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fel_memcpy_down:
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ldr r0, 1f /* dst_addr */
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ldr r1, 2f /* src_addr */
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ldr r2, 3f /* bytes */
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sub r3, r0, r1
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tst r3, #3 /* test LSB for word alignment */
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bne copydn_tail /* unaligned access, copy byte-wise */
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copydn_head:
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add r3, r1, r2 /* r3 = r1 + r2, for alignment check */
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tst r3, #3 /* word boundary? */
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beq copydn_loop
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subs r2, #1 /* r2 -= 1 */
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bxmi lr /* early return on small byte count (r2 < 0) */
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ldrb r3, [r1, r2] /* load byte */
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strb r3, [r0, r2] /* store byte */
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b copydn_head
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copydn_loop:
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subs r2, #4 /* r2 -= 4 */
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ldrpl r3, [r1, r2] /* load word */
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strpl r3, [r0, r2] /* store word */
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bpl copydn_loop /* while (r2 >= 0) */
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add r2, #4 /* r2 = remaining byte count */
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copydn_tail:
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subs r2, #1 /* r2 -= 1 */
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bxmi lr /* return on (r2 < 0) */
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ldrb r3, [r1, r2] /* load byte */
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strb r3, [r0, r2] /* store byte */
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b copydn_tail
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1: .word 0 /* dst_addr */
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2: .word 0 /* src_addr */
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3: .word 0 /* bytes */
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55
thunks/memcpy.h
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55
thunks/memcpy.h
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@ -0,0 +1,55 @@
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/* <fel_memcpy_up>: */
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htole32(0xe59f0054), /* 0: ldr r0, [pc, #84] */
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htole32(0xe59f1054), /* 4: ldr r1, [pc, #84] */
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htole32(0xe59f2054), /* 8: ldr r2, [pc, #84] */
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htole32(0xe0413000), /* c: sub r3, r1, r0 */
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htole32(0xe3130003), /* 10: tst r3, #3 */
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htole32(0x1a00000b), /* 14: bne 48 <copyup_tail> */
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/* <copyup_head>: */
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htole32(0xe3110003), /* 18: tst r1, #3 */
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htole32(0x0a000004), /* 1c: beq 34 <copyup_loop> */
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htole32(0xe4d13001), /* 20: ldrb r3, [r1], #1 */
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htole32(0xe4c03001), /* 24: strb r3, [r0], #1 */
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htole32(0xe2522001), /* 28: subs r2, r2, #1 */
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htole32(0x5afffff9), /* 2c: bpl 18 <copyup_head> */
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htole32(0xe12fff1e), /* 30: bx lr */
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/* <copyup_loop>: */
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htole32(0xe2522004), /* 34: subs r2, r2, #4 */
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htole32(0x54913004), /* 38: ldrpl r3, [r1], #4 */
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htole32(0x54803004), /* 3c: strpl r3, [r0], #4 */
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htole32(0x5afffffb), /* 40: bpl 34 <copyup_loop> */
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htole32(0xe2822004), /* 44: add r2, r2, #4 */
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/* <copyup_tail>: */
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htole32(0xe2522001), /* 48: subs r2, r2, #1 */
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htole32(0x412fff1e), /* 4c: bxmi lr */
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htole32(0xe4d13001), /* 50: ldrb r3, [r1], #1 */
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htole32(0xe4c03001), /* 54: strb r3, [r0], #1 */
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htole32(0xeafffffa), /* 58: b 48 <copyup_tail> */
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/* <fel_memcpy_down>: */
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htole32(0xe59f0058), /* 68: ldr r0, [pc, #88] */
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htole32(0xe59f1058), /* 6c: ldr r1, [pc, #88] */
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htole32(0xe59f2058), /* 70: ldr r2, [pc, #88] */
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htole32(0xe0403001), /* 74: sub r3, r0, r1 */
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htole32(0xe3130003), /* 78: tst r3, #3 */
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htole32(0x1a00000c), /* 7c: bne b4 <copydn_tail> */
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/* <copydn_head>: */
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htole32(0xe0813002), /* 80: add r3, r1, r2 */
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htole32(0xe3130003), /* 84: tst r3, #3 */
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htole32(0x0a000004), /* 88: beq a0 <copydn_loop> */
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htole32(0xe2522001), /* 8c: subs r2, r2, #1 */
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htole32(0x412fff1e), /* 90: bxmi lr */
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htole32(0xe7d13002), /* 94: ldrb r3, [r1, r2] */
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htole32(0xe7c03002), /* 98: strb r3, [r0, r2] */
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htole32(0xeafffff7), /* 9c: b 80 <copydn_head> */
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/* <copydn_loop>: */
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htole32(0xe2522004), /* a0: subs r2, r2, #4 */
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htole32(0x57913002), /* a4: ldrpl r3, [r1, r2] */
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htole32(0x57803002), /* a8: strpl r3, [r0, r2] */
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htole32(0x5afffffb), /* ac: bpl a0 <copydn_loop> */
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htole32(0xe2822004), /* b0: add r2, r2, #4 */
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/* <copydn_tail>: */
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htole32(0xe2522001), /* b4: subs r2, r2, #1 */
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htole32(0x412fff1e), /* b8: bxmi lr */
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htole32(0xe7d13002), /* bc: ldrb r3, [r1, r2] */
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htole32(0xe7c03002), /* c0: strb r3, [r0, r2] */
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htole32(0xeafffffa), /* c4: b b4 <copydn_tail> */
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41
thunks/readl_writel.S
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41
thunks/readl_writel.S
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@ -0,0 +1,41 @@
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/*
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* Thunk code for buffered 'long' (i.e. 32-bit) read and write operations
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*/
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.equ MAX_WORDS, 0x100 - 12
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fel_readl_n:
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ldr r0, 1f /* read_addr */
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adr r1, 3f /* read_data */
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ldr r2, 2f /* read_count */
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/* limit word count to a maximum value */
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cmp r2, #MAX_WORDS
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movgt r2, #MAX_WORDS
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read_loop:
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subs r2, #1
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bxmi lr
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ldr r3, [r0], #4
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str r3, [r1], #4
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b read_loop
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1: .word 0 /* read_addr */
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2: .word 0 /* read_count */
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3: .word 0 /* read_data */
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fel_writel_n:
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ldr r0, 1f /* write_addr */
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adr r1, 3f /* write_data */
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ldr r2, 2f /* write_count */
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/* limit word count to a maximum value */
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cmp r2, #MAX_WORDS
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movgt r2, #MAX_WORDS
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write_loop:
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subs r2, #1
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bxmi lr
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ldr r3, [r1], #4
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str r3, [r0], #4
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b write_loop
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1: .word 0 /* write_addr */
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2: .word 0 /* write_count */
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3: .word 0 /* write_data */
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24
thunks/readl_writel.h
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24
thunks/readl_writel.h
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@ -0,0 +1,24 @@
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/* <fel_readl_n>: */
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htole32(0xe59f0020), /* 0: ldr r0, [pc, #32] */
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htole32(0xe28f1024), /* 4: add r1, pc, #36 */
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htole32(0xe59f201c), /* 8: ldr r2, [pc, #28] */
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htole32(0xe35200f4), /* c: cmp r2, #244 */
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htole32(0xc3a020f4), /* 10: movgt r2, #244 */
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/* <read_loop>: */
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htole32(0xe2522001), /* 14: subs r2, r2, #1 */
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htole32(0x412fff1e), /* 18: bxmi lr */
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htole32(0xe4903004), /* 1c: ldr r3, [r0], #4 */
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htole32(0xe4813004), /* 20: str r3, [r1], #4 */
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htole32(0xeafffffa), /* 24: b 14 <read_loop> */
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/* <fel_writel_n>: */
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htole32(0xe59f0020), /* 34: ldr r0, [pc, #32] */
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htole32(0xe28f1024), /* 38: add r1, pc, #36 */
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htole32(0xe59f201c), /* 3c: ldr r2, [pc, #28] */
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htole32(0xe35200f4), /* 40: cmp r2, #244 */
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htole32(0xc3a020f4), /* 44: movgt r2, #244 */
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/* <write_loop>: */
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htole32(0xe2522001), /* 48: subs r2, r2, #1 */
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htole32(0x412fff1e), /* 4c: bxmi lr */
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htole32(0xe4913004), /* 50: ldr r3, [r1], #4 */
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htole32(0xe4803004), /* 54: str r3, [r0], #4 */
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htole32(0xeafffffa), /* 58: b 48 <write_loop> */
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24
thunks/rmr-thunk.S
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24
thunks/rmr-thunk.S
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@ -0,0 +1,24 @@
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/*
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* Request AArch32/AArch64 warm reset, using RVBAR and Reset Management Register
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*/
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rmr_request:
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ldr r0, 1f /* RVBAR register address */
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ldr r1, 2f /* desired entry point (reset vector) */
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str r1, [r0]
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dsb
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isb /* make sure we write the address */
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ldr r1, 3f /* RMR mode: bit 1 = RR, bit 0 = AA64 */
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mrc p15, 0, r0, c12, c0, 2 /* read RMR */
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orr r0, r0, r1 /* request warm reset (according to rmr_mode) */
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mcr p15, 0, r0, c12, c0, 2 /* write RMR, trigger reset */
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isb
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0:
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wfi
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b 0b /* loop */
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1: .word 0 /* rvbar_reg */
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2: .word 0 /* entry_point */
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3: .word 0 /* rmr_mode (2 = AArch32, 3 = AArch64) */
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13
thunks/rmr-thunk.h
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13
thunks/rmr-thunk.h
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@ -0,0 +1,13 @@
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/* <rmr_request>: */
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htole32(0xe59f0028), /* 0: ldr r0, [pc, #40] */
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htole32(0xe59f1028), /* 4: ldr r1, [pc, #40] */
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htole32(0xe5801000), /* 8: str r1, [r0] */
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htole32(0xf57ff04f), /* c: dsb sy */
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htole32(0xf57ff06f), /* 10: isb sy */
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htole32(0xe59f101c), /* 14: ldr r1, [pc, #28] */
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htole32(0xee1c0f50), /* 18: mrc 15, 0, r0, cr12, cr0, {2} */
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htole32(0xe1800001), /* 1c: orr r0, r0, r1 */
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htole32(0xee0c0f50), /* 20: mcr 15, 0, r0, cr12, cr0, {2} */
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htole32(0xf57ff06f), /* 24: isb sy */
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htole32(0xe320f003), /* 28: wfi */
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htole32(0xeafffffd), /* 2c: b 28 <rmr_request+0x28> */
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