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uart0-helloworld-sdboot: add V5 support

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Clock and UART wise close to the H6, but UART0 is only on pins PB9/10,
with no other muxes than PortF.

Signed-off-by: Andre Przywara <osp@andrep.de>
This commit is contained in:
Andre Przywara 2022-07-28 22:46:17 +01:00
parent cbaf572b3d
commit 91fcdf81fe
1 changed files with 10 additions and 2 deletions
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12
uart0-helloworld-sdboot.c
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@ -143,6 +143,7 @@ enum sunxi_gpio_number {
#define SUN8I_H3_GPA_UART0 (2) #define SUN8I_H3_GPA_UART0 (2)
#define SUN8I_R528_GPE_UART0 (6) #define SUN8I_R528_GPE_UART0 (6)
#define SUN8I_V3S_GPB_UART0 (3) #define SUN8I_V3S_GPB_UART0 (3)
#define SUN8I_V5_GPB_UART0 (2)
#define SUN8I_V831_GPH_UART0 (5) #define SUN8I_V831_GPH_UART0 (5)
#define SUN8I_V853_GPH_UART0 (5) #define SUN8I_V853_GPH_UART0 (5)
#define SUN50I_H5_GPA_UART0 (2) #define SUN50I_H5_GPA_UART0 (2)
@ -312,6 +313,7 @@ void soc_detection_init(void)
#define soc_is_v831() (soc_id == 0x1817) #define soc_is_v831() (soc_id == 0x1817)
#define soc_is_v853() (soc_id == 0x1886) #define soc_is_v853() (soc_id == 0x1886)
#define soc_is_r528() (soc_id == 0x1859) #define soc_is_r528() (soc_id == 0x1859)
#define soc_is_v5() (soc_id == 0x1721)
/* A10s and A13 share the same ID, so we need a little more effort on those */ /* A10s and A13 share the same ID, so we need a little more effort on those */
@ -396,7 +398,7 @@ void clock_init_uart_r329(void)
void clock_init_uart(void) void clock_init_uart(void)
{ {
if (soc_is_h6() || soc_is_v831() || soc_is_h616()) if (soc_is_h6() || soc_is_v831() || soc_is_h616() || soc_is_v5())
clock_init_uart_h6(); clock_init_uart_h6();
else if (soc_is_r329() || soc_is_v853() || soc_is_r528()) else if (soc_is_r329() || soc_is_v853() || soc_is_r528())
clock_init_uart_r329(); clock_init_uart_r329();
@ -484,6 +486,10 @@ void gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPE(2), SUN8I_R528_GPE_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPE(2), SUN8I_R528_GPE_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPE(3), SUN8I_R528_GPE_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPE(3), SUN8I_R528_GPE_UART0);
sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP);
} else if (soc_is_v5()) {
sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V5_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_V5_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
} else { } else {
/* Unknown SoC */ /* Unknown SoC */
while (1) {} while (1) {}
@ -580,7 +586,7 @@ int get_boot_device(void)
void bases_init(void) void bases_init(void)
{ {
if (soc_is_h6() || soc_is_v831() || soc_is_h616()) { if (soc_is_h6() || soc_is_v831() || soc_is_h616() || soc_is_v5()) {
pio_base = H6_PIO_BASE; pio_base = H6_PIO_BASE;
uart0_base = H6_UART0_BASE; uart0_base = H6_UART0_BASE;
} else if (soc_is_r329()) { } else if (soc_is_r329()) {
@ -637,6 +643,8 @@ int main(void)
uart0_puts("Allwinner V853!\n"); uart0_puts("Allwinner V853!\n");
else if (soc_is_r528()) else if (soc_is_r528())
uart0_puts("Allwinner R528/T113!\n"); uart0_puts("Allwinner R528/T113!\n");
else if (soc_is_v5())
uart0_puts("Allwinner V5!\n");
else else
uart0_puts("unknown Allwinner SoC!\n"); uart0_puts("unknown Allwinner SoC!\n");