BPI/sunxi-tools
5
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fel: add initial SoC info for V831

Browse Source 
The non-IRQ stack is moved to near the end of the SRAM C, which is very
high, and have no need to save.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
Icenowy Zheng 2020-09-12 18:11:37 +08:00
parent 613e4bae5c
commit c6111193f6
1 changed files with 24 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
soc_info.c
View File

@ -110,6 +110,21 @@ sram_swap_buffers h6_sram_swap_buffers[] = {
{ .size = 0 } /* End of the table */
};
/*
* V831 has 96KiB SRAM A1 at 0x20000 where the SPL has to be loaded to.
* SRAM C is continuous with SRAM A1, and both SRAMs are tried to be used
* by BROM. Memory space is allocated both from the start of SRAM A1 and
* the end of SRAM C.
* The start of SRAM C is in between these areas, and can serve as backup
* of IRQ stack, which is inside the first 32KiB of SRAM A1. Other areas
* that are critical on older SoCs seem to be already in SRAM C, which
* we do not need to preserve.
*/
sram_swap_buffers v831_sram_swap_buffers[] = {
{ .buf1 = 0x21000, .buf2 = 0x38000, .size = 0x1000 },
{ .size = 0 } /* End of the table */
};
const watchdog_info wd_a10_compat = {
.reg_mode = 0x01C20C94,
.reg_mode_value = 3,
@ -249,6 +264,15 @@ soc_info_t soc_info_table[] = {
.rvbar_reg = 0x09010040,
/* Check L.NOP in the OpenRISC reset vector */
.needs_smc_workaround_if_zero_word_at_addr = 0x100004,
},{
.soc_id = 0x1817, /* Allwinner V831 */
.name = "V831",
.spl_addr = 0x20000,
.scratch_addr = 0x21000,
.thunk_addr = 0x2A200, .thunk_size = 0x200,
.swap_buffers = v831_sram_swap_buffers,
.sid_base = 0x03006000,
.sid_offset = 0x200,
},{
.swap_buffers = NULL /* End of the table */
}