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Merge pull request #81 from n1tehawk/20161110_h5

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Add initial H5 support in sunxi-fel and uart0-helloworld-sdboot.sunxi
This commit is contained in:
NiteHawk 2016-11-11 13:27:19 +01:00 committed by GitHub
commit dc1b5889c3
2 changed files with 23 additions and 1 deletions
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10
fel.c
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@ -264,6 +264,7 @@ void aw_fel_print_version(libusb_device_handle *usb)
case 0x1667: soc_name="A33"; break;
case 0x1673: soc_name="A83T"; break;
case 0x1680: soc_name="H3"; break;
case 0x1718: soc_name="H5"; break;
}
printf("%.8s soc=%08x(%s) %08x ver=%04x %02x %02x scratchpad=%08x %08x %08x\n",
@ -607,6 +608,15 @@ soc_sram_info soc_sram_info_table[] = {
.swap_buffers = a10_a13_a20_sram_swap_buffers,
.sid_addr = 0x01C14200,
},
{
.soc_id = 0x1718, /* Allwinner H5 */
.spl_addr = 0x10000,
.scratch_addr = 0x11000,
.thunk_addr = 0x1A200, .thunk_size = 0x200,
.swap_buffers = a64_sram_swap_buffers,
.sid_addr = 0x01C14200,
.rvbar_reg = 0x017000A0,
},
{
.soc_id = 0x1639, /* Allwinner A80 */
.spl_addr = 0x10000,

14
uart0-helloworld-sdboot.c
View File

@ -138,6 +138,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPB_UART0 (2)
#define SUN6I_GPH_UART0 (2)
#define SUN8I_H3_GPA_UART0 (2)
#define SUN50I_H5_GPA_UART0 (2)
#define SUN50I_A64_GPB_UART0 (4)
#define SUNXI_GPF_UART0 (4)
@ -288,6 +289,11 @@ int soc_is_h3(void)
return soc_id == 0x1680;
}
int soc_is_h5(void)
{
return soc_id == 0x1718;
}
/*****************************************************************************
* UART is mostly the same on A10/A13/A20/A31/H3/A64, except that newer SoCs *
* have changed the APB numbering scheme (A10/A13/A20 used to have APB0 and *
@ -348,6 +354,10 @@ void gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP);
} else if (soc_is_h5()) {
sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN50I_H5_GPA_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN50I_H5_GPA_UART0);
sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP);
} else {
/* Unknown SoC */
while (1) {}
@ -420,7 +430,7 @@ enum { BOOT_DEVICE_UNK, BOOT_DEVICE_FEL, BOOT_DEVICE_MMC0, BOOT_DEVICE_SPI };
int get_boot_device(void)
{
u32 *spl_signature = (void *)0x4;
if (soc_is_a64() || soc_is_a80())
if (soc_is_a64() || soc_is_a80() || soc_is_h5())
spl_signature = (void *)0x10004;
/* Check the eGON.BT0 magic in the SPL header */
@ -457,6 +467,8 @@ int main(void)
uart0_puts("Allwinner A64!\n");
else if (soc_is_h3())
uart0_puts("Allwinner H3!\n");
else if (soc_is_h5())
uart0_puts("Allwinner H5!\n");
else
uart0_puts("unknown Allwinner SoC!\n");