11 Commits

Author SHA1 Message Date
Jernej Skrabec
40ac9dafe1 Add support for H616 2020-10-02 17:42:25 +02:00
Icenowy Zheng
3c2faa16d5 uart0-helloworld-sdboot: add support for V831 SoC
V831 SoC is one of sun8i family (with Cortex-A7 CPUs), and it follows a
similar memory map with H6.

Add support for it. The detection for H6-style memory map is positive on
V831, because it have the same version of GIC at the same address.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2020-09-29 14:28:12 +08:00
Icenowy Zheng
d0f2fbb8a1 uart0-helloworld-sdboot: add support for H6
Allwinner H6 SoC has a totally different memory map and different clock
control unit with other SoCs.

Add support for it in uart0-helloworld-sdboot.

To avoid writing blindly into the device MMIO area first (for triggering
the SRAM version register), we query the known content of some GIC register
to verify we are looking at an H6 memory map.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Andre Przywara <osp@andrep.de>
2018-07-09 09:16:24 +01:00
Icenowy Zheng
4acf2a922f uart0-helloworld-sdboot: allow flexible GPIO/UART0 base address
Allwinner A80 and H6 SoC has totally different memory map with other
Allwinner SoCs, and so the GPIO/UART0 base addresses are different on
these SoCs.

Use a static variable to store the base address, to fit these SoCs with
different memory map.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Andre Przywara <osp@andrep.de>
2018-07-09 09:16:24 +01:00
Bernhard Nortmann
382bb4c2eb uart0-helloworld: Refactor SID fix
Also includes an updated uart0-helloworld-sdboot.sunxi binary.

Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
2016-12-28 13:38:56 +01:00
Icenowy Zheng
4d62e7cb63 uart0-helloworld-sdboot: differ H2+ with H3
With fixed SID reading routine, it's now possible to differ H2+ with H3
with SID.

Tested on an Orange Pi One and an Orange Pi Zero.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
2016-12-28 13:30:09 +01:00
Icenowy Zheng
e96abe7234 uart0-helloworld-sdboot: add support for V3s SoC
Add the SoC ID and UART0 pinmux for V3s.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
2016-12-28 17:50:37 +08:00
Chen-Yu Tsai
e480633927 uart0-helloworld: Add support for R40
The R40 is the same as the A20 for all intents and purposes of
uart0-helloworld.

Add R40's SOC ID.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2016-11-29 15:23:11 +08:00
Bernhard Nortmann
93a26d58ad uart0-helloworld: Refactor SoC detection
Besides having fewer lines of code, the #define macros should
also prevent users from accidentally using these names without
braces (i.e. as function pointers). Instead, this will cause
compiler errors now.

soc_info.c: add "A10s" label in comment for SoC ID 0x1625.

Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
2016-11-16 17:37:50 +01:00
Icenowy Zheng
acd958626d uart0-helloworld: port to H5
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Bernhard Nortmann <bernhard.nortmann@web.de>
2016-11-11 01:34:31 +01:00
Siarhei Siamashka
958143e77b Add new uart0-helloworld-sdboot.sunxi bootable test image
This is a universal bootable image, which just prints a hello
message on UART0. For example, it is useful as a test payload
when debugging the SPI boot functionality:
   https://linux-sunxi.org/Bootable_SPI_flash

Changes in v2:
 - A workaround for https://patchwork.ozlabs.org/patch/622173
 - Also print the type of the used bootable media

Changes in v3:
 - Bernhard Nortmann's workaround for
   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63803

More details in https://github.com/linux-sunxi/sunxi-tools/pull/44

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2016-06-03 06:04:44 +03:00