2022-03-27 23:28:14 +08:00

139 lines
3.8 KiB
Diff

From a07aa8c4a2300568b6c24a688a454ece1b404824 Mon Sep 17 00:00:00 2001
From: YuzukiTsuru <gloomyghost@gloomyghost.com>
Date: Mon, 21 Feb 2022 22:22:04 +0800
Subject: [PATCH] fbtft fix disp init
---
drivers/staging/fbtft/fb_st7789v.c | 94 ++++++++++++------------------
1 file changed, 36 insertions(+), 58 deletions(-)
diff --git a/drivers/staging/fbtft/fb_st7789v.c b/drivers/staging/fbtft/fb_st7789v.c
index eb6f55600..0ed271198 100644
--- a/drivers/staging/fbtft/fb_st7789v.c
+++ b/drivers/staging/fbtft/fb_st7789v.c
@@ -16,8 +16,8 @@
#define DRVNAME "fb_st7789v"
-#define DEFAULT_GAMMA \
- "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
+#define DEFAULT_GAMMA \
+ "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"
/**
@@ -76,50 +76,28 @@ enum st7789v_command {
*/
static int init_display(struct fbtft_par *par)
{
- /* turn off sleep mode */
- write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
- mdelay(120);
-
- /* set pixel format to RGB-565 */
- write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
-
- write_reg(par, PORCTRL, 0x08, 0x08, 0x00, 0x22, 0x22);
-
- /*
- * VGH = 13.26V
- * VGL = -10.43V
- */
- write_reg(par, GCTRL, 0x35);
-
- /*
- * VDV and VRH register values come from command write
- * (instead of NVM)
- */
- write_reg(par, VDVVRHEN, 0x01, 0xFF);
-
- /*
- * VAP = 4.1V + (VCOM + VCOM offset + 0.5 * VDV)
- * VAN = -4.1V + (VCOM + VCOM offset + 0.5 * VDV)
- */
- write_reg(par, VRHS, 0x0B);
-
- /* VDV = 0V */
- write_reg(par, VDVS, 0x20);
-
- /* VCOM = 0.9V */
- write_reg(par, VCOMS, 0x20);
-
- /* VCOM offset = 0V */
- write_reg(par, VCMOFSET, 0x20);
-
- /*
- * AVDD = 6.8V
- * AVCL = -4.8V
- * VDS = 2.3V
- */
- write_reg(par, PWCTRL1, 0xA4, 0xA1);
-
- write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
+ par->fbtftops.reset(par);
+ mdelay(50);
+ write_reg(par, 0x36, 0x00);
+ write_reg(par, 0x3A, 0x05);
+ write_reg(par, 0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33);
+ write_reg(par, 0xB7, 0x35);
+ write_reg(par, 0xBB, 0x19);
+ write_reg(par, 0xC0, 0x2C);
+ write_reg(par, 0xC2, 0x01);
+ write_reg(par, 0xC3, 0x12);
+ write_reg(par, 0xC4, 0x20);
+ write_reg(par, 0xC6, 0x0F);
+ write_reg(par, 0xD0, 0xA4, 0xA1);
+ write_reg(par, 0xE0, 0xD0, 0x04, 0x0D, 0x11, 0x13, 0x2B, 0x3F, 0x54,
+ 0x4C, 0x18, 0x0D, 0x0B, 0x1F, 0x23);
+ write_reg(par, 0xE1, 0xD0, 0x04, 0x0C, 0x11, 0x13, 0x2C, 0x3F, 0x44,
+ 0x51, 0x2F, 0x1F, 0x1F, 0x20, 0x23);
+ write_reg(par, 0x21);
+ write_reg(par, 0x11);
+ mdelay(50);
+ write_reg(par, 0x29);
+ mdelay(200);
return 0;
}
@@ -201,12 +179,11 @@ static int set_gamma(struct fbtft_par *par, u32 *curves)
c = i * par->gamma.num_values;
for (j = 0; j < par->gamma.num_values; j++)
curves[c + j] &= gamma_par_mask[j];
- write_reg(par, PVGAMCTRL + i,
- curves[c + 0], curves[c + 1], curves[c + 2],
- curves[c + 3], curves[c + 4], curves[c + 5],
- curves[c + 6], curves[c + 7], curves[c + 8],
- curves[c + 9], curves[c + 10], curves[c + 11],
- curves[c + 12], curves[c + 13]);
+ write_reg(par, PVGAMCTRL + i, curves[c + 0], curves[c + 1],
+ curves[c + 2], curves[c + 3], curves[c + 4],
+ curves[c + 5], curves[c + 6], curves[c + 7],
+ curves[c + 8], curves[c + 9], curves[c + 10],
+ curves[c + 11], curves[c + 12], curves[c + 13]);
}
return 0;
}
@@ -235,12 +212,13 @@ static struct fbtft_display display = {
.gamma_num = 2,
.gamma_len = 14,
.gamma = DEFAULT_GAMMA,
- .fbtftops = {
- .init_display = init_display,
- .set_var = set_var,
- .set_gamma = set_gamma,
- .blank = blank,
- },
+ .fbtftops =
+ {
+ .init_display = init_display,
+ .set_var = set_var,
+ .set_gamma = set_gamma,
+ .blank = blank,
+ },
};
FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789v", &display);
--
2.17.1