969 lines
25 KiB
Diff
969 lines
25 KiB
Diff
From 091209864a90c83e11926cf484dbc4a86c34bcfe Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Wed, 31 May 2023 11:12:16 -0500
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Subject: [PATCH 1/5] arm64: dts: rockchip: add default pinctrl for rk3588 emmc
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Add a default pinctrl definition for the rk3588 emmc.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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index a3124bd2e092..03462ae13ac7 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -1196,6 +1196,9 @@ sdhci: mmc@fe2e0000 {
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<&cru TMCLK_EMMC>;
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clock-names = "core", "bus", "axi", "block", "timer";
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max-frequency = <200000000>;
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+ pinctrl-0 = <&emmc_rstnout>, <&emmc_bus8>, <&emmc_clk>,
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+ <&emmc_cmd>, <&emmc_data_strobe>;
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+ pinctrl-names = "default";
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resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
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<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
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<&cru SRST_T_EMMC>;
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--
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2.41.0
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From 9ac1b750fa33e5a340eaee65cf1085cad9ede25d Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Wed, 31 May 2023 11:12:17 -0500
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Subject: [PATCH 2/5] arm64: dts: rockchip: Add sdio node to rk3588
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Add SDIO node for rk3588/rk3588s.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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index 03462ae13ac7..7b93abd8f65c 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -1185,6 +1185,21 @@ sdmmc: mmc@fe2c0000 {
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status = "disabled";
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};
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+ sdio: mmc@fe2d0000 {
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+ compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
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+ reg = <0x00 0xfe2d0000 0x00 0x4000>;
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+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>,
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+ <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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+ fifo-depth = <0x100>;
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+ max-frequency = <200000000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdiom1_pins>;
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+ power-domains = <&power RK3588_PD_SDIO>;
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+ status = "disabled";
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+ };
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+
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sdhci: mmc@fe2e0000 {
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compatible = "rockchip,rk3588-dwcmshc";
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reg = <0x0 0xfe2e0000 0x0 0x10000>;
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--
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2.41.0
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From 5799db8897382289eb29505050b6940ef5587628 Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Wed, 31 May 2023 11:12:18 -0500
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Subject: [PATCH 3/5] dt-bindings: vendor-prefixes: add Indiedroid
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Indiedroid is a sub-brand of Ameridroid for their line of single board
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computers.
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https://indiedroid.us/
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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---
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Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
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index 82d39ab0231b..580f32086d55 100644
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--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
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+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
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@@ -617,6 +617,8 @@ patternProperties:
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description: Integrated Micro-Electronics Inc.
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"^incircuit,.*":
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description: In-Circuit GmbH
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+ "^indiedroid,.*":
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+ description: Indiedroid
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"^inet-tek,.*":
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description: Shenzhen iNet Mobile Internet Technology Co., Ltd
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"^infineon,.*":
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--
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2.41.0
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From abebfc368ca4c72ae0f789fb72a62a00fcb417f5 Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Wed, 31 May 2023 11:12:19 -0500
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Subject: [PATCH 4/5] dt-bindings: arm: rockchip: Add Indiedroid Nova
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Add Indiedroid Nova, an rk3588s based single board computer.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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Acked-by: Conor Dooley <conor.dooley@microchip.com>
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---
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Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
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index ec141c937b8b..3c5a204bcd81 100644
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--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
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+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
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@@ -542,6 +542,11 @@ properties:
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- khadas,edge-v
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- const: rockchip,rk3399
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+ - description: Indiedroid Nova SBC
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+ items:
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+ - const: indiedroid,nova
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+ - const: rockchip,rk3588s
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+
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- description: Khadas Edge2 series boards
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items:
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- const: khadas,edge2
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--
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2.41.0
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From 6b199a6dfde0f0f521d88b45df884dc3b5743571 Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Wed, 31 May 2023 11:12:20 -0500
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Subject: [PATCH 5/5] arm64: dts: rockchip: Add Indiedroid Nova board
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The Indiedroid Nova is an SBC from a sub-brand of Ameridroid that
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includes the following hardware:
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- A 40-pin GPIO header
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- 2 USB-A 3.0 ports
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- 2 USB-A 2.0 ports
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- A USB-C 2.0 OTG port (used for USB power delivery)
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- A USB-C 3.0 port that can do display port output.
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- A Micro HDMI 2.1 port.
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- A 1GB ethernet port.
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- An RT8821CS based WiFi/Bluetooth module.
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- A user replaceable eMMC module.
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- An SDMMC card slot.
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- A MIPI DSI connector.
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- A MIPI CSI connector.
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- A 3.5mm TRRS audio jack with microphone input.
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- An 2 pin socket for an RTC battery.
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- A 4 pin socket for a debug port.
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- A power button (connected to PMIC), a reset button (connected to SoC
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reset), a boot button, and a recovery button (both connected to the
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ADC).
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- 4GB, 8GB, or 16GB of system RAM.
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This initial devicetree includes support for the WiFi, bluetooth,
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analog audio out/in, SDMMC, eMMC, RTC, UART debugging, and has
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the regulator values from the schematics. ADC, graphics output, GPU,
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USB, and wired ethernet are still pending additional upstream changes.
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Analog audio will require changes to handle a difference between the
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requested clock frequency of 12288000 and the actual clock freqency
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of 12287999 before it will work properly. This will be done in a
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subsequent patch series.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../dts/rockchip/rk3588s-indiedroid-nova.dts | 764 ++++++++++++++++++
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2 files changed, 765 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 2d585bbb8f3a..99f11db8158d 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -94,5 +94,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
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new file mode 100644
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index 000000000000..add15cdafe76
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
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@@ -0,0 +1,764 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/usb/pd.h>
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+#include "rk3588s.dtsi"
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+
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+/ {
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+ model = "Indiedroid Nova";
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+ compatible = "indiedroid,nova", "rockchip,rk3588s";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc;
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+ mmc2 = &sdio;
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+ serial2 = &uart2;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clock-names = "ext_clock";
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+ clocks = <&rtc_hym8563>;
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+ pinctrl-0 = <&wifi_enable_h>;
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+ pinctrl-names = "default";
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+ post-power-on-delay-ms = <200>;
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+ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sound {
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+ compatible = "audio-graph-card";
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+ label = "rockchip,es8388-codec";
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+ widgets = "Microphone", "Mic Jack",
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+ "Headphone", "Headphones";
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+ routing = "LINPUT2", "Mic Jack",
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+ "Headphones", "LOUT1",
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+ "Headphones", "ROUT1";
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+ dais = <&i2s0_8ch_p0>;
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+ };
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+
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+ vbus5v0_typec: vbus5v0-typec {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-0 = <&typec5v_pwren>;
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+ pinctrl-names = "default";
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+ regulator-name = "vbus5v0_typec";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_usb>;
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+ };
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+
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+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1100000>;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-name = "vcc_1v1_nldo_s3";
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ /* Regulator is enabled whenever vcc_1v8_s0 is above 1.6v */
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+ vcc_3v3_s0: vcc-3v3-s0 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-name = "vcc_3v3_s0";
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+ vin-supply = <&vcc_3v3_s3>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_sys";
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+ };
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+
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+ vcc5v0_usb: vcc5v0-usb {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_usb";
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+ vin-supply = <&vcc5v0_usbdcin>;
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+ };
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+
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+ vcc5v0_usbdcin: vcc5v0-usbdcin {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_usbdcin";
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+ };
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_b0{
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b1{
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b2{
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+&cpu_b3{
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+/*
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+ * Add labels for each GPIO pin exposed on the 40 pin header. Note that
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+ * voltage of each GPIO pin could be either 3.3v or 1.8v (as noted by
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+ * label).
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+ */
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+&gpio0 {
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+ gpio-line-names = /* GPIO0 A0-A7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO0 B0-B7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO0 C0-C7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO0 D0-D7 */
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+ "HEADER_12_1v8", "", "", "HEADER_24_1v8",
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+ "", "", "", "";
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+};
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+
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+&gpio1 {
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+ gpio-line-names = /* GPIO1 A0-A7 */
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+ "HEADER_27_3v3", "HEADER_28_3v3", "", "",
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+ "HEADER_29_1v8", "", "HEADER_7_1v8", "",
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+ /* GPIO1 B0-B7 */
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+ "", "HEADER_31_1v8", "HEADER_33_1v8", "",
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+ "HEADER_11_1v8", "HEADER_13_1v8", "", "",
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+ /* GPIO1 C0-C7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO1 D0-D7 */
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+ "", "", "", "",
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+ "", "", "HEADER_5_3v3", "HEADER_3_3v3";
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+};
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+
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+&gpio3 {
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+ gpio-line-names = /* GPIO3 A0-A7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO3 B0-B7 */
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+ "HEADER_16_1v8", "HEADER_18_1v8", "", "",
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+ "", "", "", "HEADER_19_1v8",
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+ /* GPIO3 C0-C7 */
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+ "HEADER_21_1v8", "HEADER_23_1v8", "", "HEADER_26_1v8",
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+ "HEADER_15_1v8", "HEADER_22_1v8", "", "",
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+ /* GPIO3 D0-D7 */
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+ "", "", "", "",
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+ "", "", "", "";
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+};
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+
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+&gpio4 {
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+ gpio-line-names = /* GPIO4 A0-A7 */
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+ "", "", "HEADER_37_3v3", "HEADER_32_3v3",
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+ "HEADER_36_3v3", "", "HEADER_35_3v3", "HEADER_38_3v3",
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+ /* GPIO4 B0-B7 */
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+ "", "", "", "HEADER_40_3v3",
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+ "HEADER_8_3v3", "HEADER_10_3v3", "", "",
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+ /* GPIO4 C0-C7 */
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+ "", "", "", "",
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+ "", "", "", "",
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+ /* GPIO4 D0-D7 */
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+ "", "", "", "",
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+ "", "", "", "";
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+};
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+
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+&i2c0 {
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+ pinctrl-0 = <&i2c0m2_xfer>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+
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+ vdd_cpu_big0_s0: regulator@42 {
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+ compatible = "rockchip,rk8602";
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+ reg = <0x42>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-max-microvolt = <1050000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-name = "vdd_cpu_big0_s0";
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_big1_s0: regulator@43 {
|
|
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
|
|
+ reg = <0x43>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1050000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-name = "vdd_cpu_big1_s0";
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+
|
|
+ vdd_npu_s0: regulator@42 {
|
|
+ compatible = "rockchip,rk8602";
|
|
+ reg = <0x42>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-name = "vdd_npu_s0";
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c6 {
|
|
+ pinctrl-0 = <&i2c6m3_xfer>;
|
|
+ status = "okay";
|
|
+
|
|
+ fusb302: typec-portc@22 {
|
|
+ compatible = "fcs,fusb302";
|
|
+ reg = <0x22>;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-0 = <&usbc0_int>;
|
|
+ pinctrl-names = "default";
|
|
+ vbus-supply = <&vbus5v0_typec>;
|
|
+
|
|
+ connector {
|
|
+ compatible = "usb-c-connector";
|
|
+ data-role = "dual";
|
|
+ label = "USB-C";
|
|
+ power-role = "dual";
|
|
+ try-power-role = "sink";
|
|
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
|
+ sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
|
|
+ op-sink-microwatt = <1000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rtc_hym8563: rtc@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "hym8563";
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-0 = <&hym8563_int>;
|
|
+ pinctrl-names = "default";
|
|
+ wakeup-source;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c7 {
|
|
+ pinctrl-0 = <&i2c7m0_xfer>;
|
|
+ status = "okay";
|
|
+
|
|
+ es8388: audio-codec@11 {
|
|
+ compatible = "everest,es8388";
|
|
+ reg = <0x11>;
|
|
+ assigned-clock-rates = <12288000>;
|
|
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
|
|
+ AVDD-supply = <&vcc_3v3_s3>;
|
|
+ clock-names = "mclk";
|
|
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
|
|
+ DVDD-supply = <&vcc_1v8_s3>;
|
|
+ HPVDD-supply = <&vcc_3v3_s3>;
|
|
+ PVDD-supply = <&vcc_1v8_s3>;
|
|
+ #sound-dai-cells = <0>;
|
|
+
|
|
+ port {
|
|
+ es8388_p0_0: endpoint {
|
|
+ remote-endpoint = <&i2s0_8ch_p0_0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s0_8ch {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s0_lrck
|
|
+ &i2s0_mclk
|
|
+ &i2s0_sclk
|
|
+ &i2s0_sdi0
|
|
+ &i2s0_sdo0>;
|
|
+ status = "okay";
|
|
+
|
|
+ i2s0_8ch_p0: port {
|
|
+ i2s0_8ch_p0_0: endpoint {
|
|
+ dai-format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ remote-endpoint = <&es8388_p0_0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
+&pinctrl {
|
|
+ bluetooth-pins {
|
|
+ bt_reset: bt-reset {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_dev: bt-wake-dev {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_host: bt-wake-host {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hym8563 {
|
|
+
|
|
+ hym8563_int: hym8563-int {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio-pwrseq {
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb-typec {
|
|
+ usbc0_int: usbc0-int {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ typec5v_pwren: typec5v-pwren {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+/* HS400 modes seemed to cause io errors. */
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ no-mmc-hs400;
|
|
+ no-sd;
|
|
+ no-sdio;
|
|
+ non-removable;
|
|
+ max-frequency = <200000000>;
|
|
+ vmmc-supply = <&vcc_3v3_s0>;
|
|
+ vqmmc-supply = <&vcc_1v8_s3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdio {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ disable-wp;
|
|
+ keep-power-in-suspend;
|
|
+ max-frequency = <100000000>;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ no-mmc;
|
|
+ no-sd;
|
|
+ non-removable;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_3v3_s3>;
|
|
+ vqmmc-supply = <&vcc_1v8_s3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ max-frequency = <200000000>;
|
|
+ no-sdio;
|
|
+ no-mmc;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_3v3_s3>;
|
|
+ vqmmc-supply = <&vccio_sd_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi2 {
|
|
+ #address-cells = <1>;
|
|
+ assigned-clocks = <&cru CLK_SPI2>;
|
|
+ assigned-clock-rates = <200000000>;
|
|
+ num-cs = <1>;
|
|
+ pinctrl-0 = <&spi2m2_pins>, <&spi2m2_cs0>;
|
|
+ pinctrl-names = "default";
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pmic@0 {
|
|
+ compatible = "rockchip,rk806";
|
|
+ reg = <0x0>;
|
|
+ #gpio-cells = <2>;
|
|
+ gpio-controller;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
|
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
|
+ pinctrl-names = "default";
|
|
+ spi-max-frequency = <1000000>;
|
|
+
|
|
+ vcc1-supply = <&vcc5v0_sys>;
|
|
+ vcc2-supply = <&vcc5v0_sys>;
|
|
+ vcc3-supply = <&vcc5v0_sys>;
|
|
+ vcc4-supply = <&vcc5v0_sys>;
|
|
+ vcc5-supply = <&vcc5v0_sys>;
|
|
+ vcc6-supply = <&vcc5v0_sys>;
|
|
+ vcc7-supply = <&vcc5v0_sys>;
|
|
+ vcc8-supply = <&vcc5v0_sys>;
|
|
+ vcc9-supply = <&vcc5v0_sys>;
|
|
+ vcc10-supply = <&vcc5v0_sys>;
|
|
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
|
|
+ vcc12-supply = <&vcc5v0_sys>;
|
|
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
|
|
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
|
|
+ vcca-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ rk806_dvs1_null: dvs1-null-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_null: dvs2-null-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_null: dvs3-null-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ regulators {
|
|
+ vdd_gpu_s0: dcdc-reg1 {
|
|
+ regulator-boot-on;
|
|
+ regulator-enable-ramp-delay = <400>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-name = "vdd_gpu_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_lit_s0: dcdc-reg2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+ regulator-name = "vdd_cpu_lit_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_logic_s0: dcdc-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-min-microvolt = <675000>;
|
|
+ regulator-name = "vdd_logic_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_vdenc_s0: dcdc-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-name = "vdd_vdenc_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_ddr_s0: dcdc-reg5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+ regulator-name = "vdd_ddr_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd2_ddr_s3: dcdc-reg6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1100000>;
|
|
+ regulator-min-microvolt = <1100000>;
|
|
+ regulator-name = "vdd2_ddr_s3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_2v0_pldo_s3: dcdc-reg7 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <2000000>;
|
|
+ regulator-min-microvolt = <2000000>;
|
|
+ regulator-name = "vdd_2v0_pldo_s3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <2000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3_s3: dcdc-reg8 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-name = "vcc_3v3_s3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vddq_ddr_s0: dcdc-reg9 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <600000>;
|
|
+ regulator-min-microvolt = <600000>;
|
|
+ regulator-name = "vddq_ddr_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s3: dcdc-reg10 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-name = "vcc_1v8_s3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s0: pldo-reg1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-name = "vcc_1v8_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8_s0: pldo-reg2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-name = "vcca_1v8_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_1v2_s0: pldo-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-name = "vdda_1v2_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_3v3_s0: pldo-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-name = "vcca_3v3_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd_s0: pldo-reg5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-name = "vccio_sd_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s3_pldo6: pldo-reg6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-name = "vcc_1v8_s3_pldo6";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_0v75_s3: nldo-reg1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-name = "vdd_0v75_s3";
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_ddr_pll_s0: nldo-reg2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-name = "vdda_ddr_pll_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ avdd_0v75_s0: nldo-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-name = "avdd_0v75_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v85_s0: nldo-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+ regulator-name = "vdda_0v85_s0";
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* Schematics show not in use */
|
|
+ nldo-reg5 {
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ pinctrl-0 = <&uart2m0_xfer>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* DMA seems to interfere with bluetooth device normal operation. */
|
|
+&uart9 {
|
|
+ pinctrl-0 = <&uart9m2_xfer>, <&uart9m2_ctsn>, <&uart9m2_rtsn>;
|
|
+ pinctrl-names = "default";
|
|
+ /delete-property/ dma-names;
|
|
+ /delete-property/ dmas;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ compatible = "realtek,rtl8821cs-bt",
|
|
+ "realtek,rtl8723bs-bt";
|
|
+ device-wake-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
|
+ enable-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
|
+ host-wake-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-0 = <&bt_reset>, <&bt_wake_dev>, <&bt_wake_host>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+};
|
|
--
|
|
2.41.0
|
|
|