9e29827ad9
- `risc-v`: rework RichNeese's boards, reduce families, move tweaks to boards - `risc-v`/`starfive`: `CONFIG_MOTORCOMM_PHY=m` for the onboard Ethernet - `risc-v`/`starfive`: use mainline kernel 6.1.y, with StarFive's rebased patches against `v6.1.5` - from https://github.com/starfive-tech/linux/commits/visionfive - contention point: `1022-soc-sifive-ccache-Add-StarFive-JH71x0-support.patch` which I merged half-assed, need review/fixes? - `risc-v`/`starfive`: update kernel config, sans changes - `risc-v`/`starfive`: switch from `grub` to `extlinux` - `risc-v`/`starfive`: new `starfive` family with their (vendor) kernel Co-authored-by: Richard Neese <r.neese@gmail.com>
34 lines
929 B
Diff
34 lines
929 B
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Samin Guo <samin.guo@starfivetech.com>
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Date: Fri, 8 Jan 2021 03:11:04 +0800
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Subject: drivers/tty/serial/8250: update driver for JH7100
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---
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drivers/tty/serial/8250/8250_port.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
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index 388172289627..e5044aa01298 100644
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--- a/drivers/tty/serial/8250/8250_port.c
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+++ b/drivers/tty/serial/8250/8250_port.c
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@@ -71,8 +71,16 @@ static const struct serial8250_config uart_config[] = {
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},
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[PORT_16550] = {
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.name = "16550",
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+#ifdef CONFIG_SOC_STARFIVE
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+ .fifo_size = 16,
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+ .tx_loadsz = 16,
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+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
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+ .rxtrig_bytes = {1, 4, 8, 14},
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+ .flags = UART_CAP_FIFO,
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+#else
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.fifo_size = 1,
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.tx_loadsz = 1,
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+#endif
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},
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[PORT_16550A] = {
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.name = "16550A",
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--
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Armbian
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