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== Colophon
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法律信息
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法律信息及版权信息
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<<<
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toc::[]
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@ -15,7 +15,7 @@ toc::[]
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=== 1.1 Introduction
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image::BPI-CM4.jpg[scaledwidth=75%]
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image::BPI-CM4.jpg[scaledwidth=75%, title="The BPI-CM4"]
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The Banana Pi Compute Module 4(CM4)is a System on Module(SoM) containing processor,DRAM, eMMC Flash and supporting power circuitry. These modules allow a designer touse the Banana Pi hardware and software stack in their own custom systems and formfactors. And, These modules offer additional IO interfaces beyond what is provided on Banana Pi boards, providing designers with more options.
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@ -57,7 +57,7 @@ Key feature of the BPI-CM4 are as follows:
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== Chapter 2. Interfaces
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=== Wireless
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=== 2.1 Wireless
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The BPI-CM4 supports an onboard wireless module based on Realtek RTL8822CS,supports both
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@ -72,30 +72,232 @@ The BPI-CM4 has two standard IPEX-1G connector on the module, If you want to use
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Banana Pi Ltd has an antenna kit which is certified to be used with the BPI-CM4. If a different antenna is used then separate certification will be required.
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=== 2.2 Ethernet
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[%autowidth]
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The BPI-CM4 has an onboard Gigabit Ethernet PHY - the https://www.realtek.com/en/products/connected-media-ics/item/rtl8211f-i-cg[REALTEK RTL8211F] - some of the major features of this PHY include;
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* IEEE 802.3az-2010
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* Built-in Wake-on-LAN
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* Crossover Detection & Auto-Correction
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A standard RJ45 connector is necessary to provid an Ethernet connection to the BPI-CM4.Can be see in link:#EthSch[Figure 2]
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[#EthSch]
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image::EthernetSch.jpg[title="Ethernet Schematic", alt=EthSch]
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The differential Ethernet signals should be routed as 100Ω differential pairs, with suitable clearances. Length matching between pairs should be better than 50mm, so in the typical case no length matching is required. However the signals within a pair need to be length matched, ideally to better than 0.15mm.
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The PHY also supports up to 2 LEDs to give user status feedback, these are low active. These LEDs can have a range of functions, and you should consult your OS driver to see which functions are supported by your driver.
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=== 2.3 PCIe(Gen2 x1)
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The BPI-CM4 has an internal PCIe2.0 x1 host controller. Connecting a PCIe device follows the standard PCIe convention.The CM4 has onboard AC coupling capacitors for *PCIe_CLK* and *PCIe_TX* signals.However the *PCIe_RX* signals need external coupling capacitors close to the driving source (the device *TX*), if you are using an external PCIe/NVMe cards these capacitors will be onboard. The PCIe conversion is that if you are wiring directly to an IC then the TX and RX pairs need to be swapped (TX->RX, RX->TX). If you are wiring to a connector then this is typically labelled from the host post of view and so TX RX swaps aren’t required. Additionally the *PCIECK_REQN* must be connected to ensure the CM4 produces a clock signal, and the *PERST0_N* should also be connected to ensure the device is correctly reset when required. The differential PCIe signals should be routed as 100Ω differential pairs, with suitable clearances. There is no need to match the lengths between pairs, only the signals within a Pair need to be length matched ideally to better than 0.1mm
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TIP: 5.10 kernel and .......
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=== 2.4 USB 2.0(HS)/3.0(SS)
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The USB 2.0 interface supports up to 480MBps signalling. The differential pair should be routed as a 90Ω differential pair. The P N signals should ideally be matched to better than 0.15mm.
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.USB 3.0 or PCIe 2.0 x1
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IMPORTANT: *USB 3.0* multiplexed with *PCIe 2.0 x1*. *USB30_RX_P/N* multiplexed with *PCIe_RX_P/N* and *USB30_TX_P/N* multiplexed with *PCIe_TX_P/N*.
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BPI-CM4 has two full-speed USB channels, one of which (USB_A) can be USB2.0 x1+ PCIe2.0 x1 or USB3.0 x1, or can use FE1.1s chip (USB 2.0 HUB chip) or VL807 (USB 3.0 HUB chip) Expanded to four-way USB.The other one (USB_B) interface also has OTG(On-The-Go) function at the same time.
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=== 2.5 GPIO
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BPI-CM4 has 17 pins available for general purpose I/O (GPIO),corresponding to the first half of the standard 40 pins of other BananaPi development boards.These pins have access to internal peripherals;PCM, IIC, UART and PWM. https://drive.google.com/file/d/1IXXok1P2OLiW3p8tavkbfEPTGTrM3b-R/view?usp=sharing[BPI-CM4 Sch ^] describes these features in detail, and the multiplexing options available. The drive strength and slew rate should ideally be set as low as possible to reduce any EMC issues.GPIOX_17 and GPIOX_18 have 2.2K pull up resistors.
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By default, GPIO bank is powered by 3V3, but GPIOX_x GPIOs can be changed to powered by 1.8V.
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NOTE: *GPIOX_x* Power Bank depending on the selected WiFi module, PCIe WiFi or RTL WiFi (default) is powered by 3.3V, and AMPAK 6275s WiFi is powered by 1.8V.
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image::GPIO.jpg[title="GPIO", alt=GPIO]
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==== 2.5.1 Alternative Function Assignments
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.GPIO Alternative Function Assignments
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[.autowidth.stretch, cols="^2,3,2,2,6,5"]
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|===
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|Operation |Operator |Operator |Operator |Operator
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|Num|GPIOx_x |PD/PU |ALT0 |ALT1 |ALT2
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|add
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|+
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|3 |GPIOX_17 |PU |GPIO |{set:cellbgcolor:#05FF0B}I2C_EE_M2_SDA |{set:cellbgcolor:!}{set:cellbgcolor:#bfbfbf}BT_EN
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|{set:cellbgcolor:!}5 |GPIOX_18 |PU |GPIO |{set:cellbgcolor:#05FF0B}I2C_EE_M2_SCL |{set:cellbgcolor:!}BT_WAKE_HOST
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|7 |GPIOH_5 |PU |GPIO |{set:cellbgcolor:#99ccff}SPDIF_IN |{set:cellbgcolor:!}
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|8 |GPIOX_6 |PU |GPIO |{set:cellbgcolor:#3265ff}UART_B_TX |{set:cellbgcolor:!}WIFI_PWREN
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|10 |GPIOx_7 |PU |GPIO |{set:cellbgcolor:#3265ff}UART_B_RX |{set:cellbgcolor:!}WIFI_WAKE_HOST
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|11 |GPIOAO_10 |PD |GPIO | |
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|12 |GPIOA_1 |PU |GPIO |I2SB_SCLK |
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|13 |GPIOH_4 |PD |GPIO |SPDIF_OUT |
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|15 |GPIOAO_5 |PU |GPIO |IR_IN |
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|16 |GPIOA_0 |PU |GPIO |I2S_MCLK |
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|18 |GPIOA_2 |PD |GPIO |I2SB_LRCLK |
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|19 |GPIOX_8 |PU |GPIO |SPI_A_MOSI |BTPCM_DIN
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|21 |GPIOX_9 |PU |GPIO |SPI_A_MISO |BTPCM_DOUT
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|22 |GPIOA-7 |PU |GPIO |I2SC_DOUT_DIN_3 |
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|23 |GPIOX_11 |PU |GPIO |SPI_A_CLK |BTPCM_CLK
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|24 |GPIOX_10 |PU |GPIO |SPI_A_SS0 |BTPCM_SYNC
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|26 |GPIOA_3 |PU |GPIO |I2SB_DOUT_DIN_0 |
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|===
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|subtract
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|multiply
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|*
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{set:cellbgcolor:#05FF0B}
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|divide
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|/
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{set:cellbgcolor:!}
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|divide
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=== 2.6 HDMI
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The BPI-CM4 supports one HDMI 2.1 interface, it capable of driving 4Kx2K 60fps output.
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HDMI signals should be routed as 100Ω differential pairs, each signal within a pair should ideally be matched to better than 0.15mm.Pairs don’t typically need any extra matching as they only have to be matched to 25mm.
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CEC, Dynamic HDR and HDCP 2.2 supported. CEC internal 27K pullup resistor and *HDMI_SDA*/*HDMI_SCL* internal 27K pullup resistor is included in the BPI-CM4.
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The BPI-CM4 need extra ESD protection maybe required.
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=== 2.7 CSI(MIPI Serial Camera)
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The BPI-CM4 supports one camera ports(4 lanes); CSI signals should be routed as 100Ω differential pairs, each signal within a pair should ideally be matched to better than 0.15mm.
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The documentation around the CSI interface can be found on the https://wiki.banana-pi.org/BPI-CM4_Computer_module_and_development_Kit[BananaPi Wiki] website while Linux kernel drivers can be found on https://github.com/BPI-SINOVOIP/BPI-M2S-bsp[Github].
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NOTE: Camera sensors supported by the official BananaPi firmware are;ShenZhenShi HongJia OS08A10 V11(sensor: OS08A20). no security device is required on Compute Module devices to use these camera sensors.
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=== 2.8 DSI(MIPI Serial Display)
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The BPI-CM4 supports one display ports(4 lanes); supports a maximum of data rate per lane of 1Gbit/s.
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The DSI interface only supported by offical BananaPi firmware are supported DSI Displays, more infomation can see https://wiki.banana-pi.org/BPI-CM4_Computer_module_and_development_Kit[BananaPi Wiki] website.DSI signals should be routed as 100Ω differential pairs, each signal within a pair should ideally be matched to better than 0.15mm.
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NOTE: BananaPi firmware only supports officially recommended DSI displays, but add and compile your own driver.
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=== 2.9 IIC(GPIO Pin3&Pin5)
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This IIC bus is not shared with CSI or DSI and can be used arbitrarily.
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=== 2.10 IIC(CAM0_SCK/SDA)
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This IIC bus(GPIOH_7/GPIOH_6) is used by default for MIPI CSI(Camera sensor), If you don't use, it can also be used for general purpose I/O or to connect other IIC devices.
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=== 2.11 IIC(TP_SCK/SDA)
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This IIC bus(GPIOA_15/GPIOA_14) is used by default for MIPI DSI Touch Panel(capacitive touch panel), If you don't use, it can also be used for general purpose I/O or to connect other IIC devices.
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NOTE: All IIC buses have 2K2 pull-up resistors on BPI-CM4
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=== 2.12 SDIO/eMMC()
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The BPI-CM4 supported 16GB eMMC flash (option up to 128GB). The *TF_VDD_EN* signal is used to enable an external power switch to turn on power to the TF_Card. If booting from TF_Card is required then a pullup resistor must also be fitted to default the power to be on.
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image::TF_Card.jpg[title="TF Card", alt=TF_CARD]
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=== 2.13 Analog(SARADC_CH2/CH3)
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These are the two ADC pins straight out of the CPU.No onboard filtering, 100K pull-up resistors on BPI-CM4.
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NOTE: If you need to use these two ADC pins, you need to consider adding filtering, the recommended value is 1000pF ~ 0.1uF
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=== 2.14 *CPU_RST*
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Pulling this pin low places BPI-CM4 in reset. Removing the pull-down state allows the BPI-CM4 to reset and run again.
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TIP: To reset BPI-CM4, the *CPU_RST* pin needs to be pulled low for at least 0ms.T~CPU_RST_L~>0ms.
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=== 2.15 *SYS_LED*
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This pin is designed to drive an LED to show the BPI-CM4 operating status. If an error occurs during startup, it will blink with the *SYS_LED2* beyond expectations to help the user easily determine the status.
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=== 2.16 *SYS_LED2*
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This pin is designed to drive an LED to show the BPI-CM4 operating status. If an error occurs during startup, it will blink with the *SYS_LED2* beyond expectations to help the user easily determine the status.
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<<<
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== Chapter 3. Electrical and Mechanical
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=== 3.1 Mechanical
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The BPI-CM4 is a compact 40 × 55mm module. The Module is 4.1mm deep, but usually the height after connection is 4.4mm.
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TIP: The height of 4.4mm after connection is the minimum height between the connector and the fixing stud recommended by bpi. If other connectors and fixing studs of the corresponding height are used, the height needs to be actually measured.
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. 4 × M3 Mounting holes (inset about 4mm from module edge)
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. PCB thickness 1.2mm ± 10%
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. https://drive.google.com/file/d/1SRAY_RDxKhw819uyo9H13zNN2wlG6LDq/view?usp=sharing[Amlogic A311D] SoC height including solder balls 1.0 ± 0.11mm
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. Stacking height either:
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.. 1.5mm with mating connector (clearance under CM4 0mm) : DF40C-100DS-0.4v
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.. 3.0mm with mating connector (clearance under CM4 1.5mm): DF40HC(3.0)-100DS-0.4v
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If the wireless antenna is used it must be orientated towards the edge of the plastic enclosure and any close by metal must have cut outs or the wireless performance will be degraded.It is recommended to fix the antenna outside the case.
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image::Mechanical.jpg[title="Mechanical", alt=Mechanical, width=75%]
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NOTE: The location and arrangement of components on the Compute Module may change slightly over time due to revisions for cost and manufacturing considerations; however the maximum component heights and PCB thickness will be kept as specified.
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=== 3.2 Thermal
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The BPI-CM4 has less passive cooling due to its smaller size, so it may run hotter.In order to ensure the life of BPI-CM4, the core temperature of the main control chip(Amlogic A311D) should be kept below 85 degrees Celsius as much as possible.If the core temperature is found to be higher than 85 degrees Celsius, you can reduce the clock frequency or add additional active and passive cooling methods.
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It is important that thermal solution chosen keeps the ambient temperature for the other silicon devices on the CM4 within the operating temperature range.
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Operating temperature range: -20°C - +85°C Non-condensing.
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=== 3.3 Electrical Specification
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WARNING: Stresses above those listed in Table 3 may cause permanent damage to the device. This is a stress rating only; functional operation of the device under these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability
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.Absolute maximum ratings
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[.autowidth.stretch, cols="2,4,2,2,2"]
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|===
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|Symbol |Parameter |Min. |Max. |Unit
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|V~IN~ |+5V_Input |-0.5 |6 |V
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|V~GPIO_ref~ |GPIO Voltage |-0.5 |3.6 |V
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|V~GPIO~ |GPIO INPUT Voltage |-0.5 |V~GPIO_ref~+0.5 |V
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|===
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==== DC Electrical Characteristics
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.Normal GPIO Specifications (For DIO)
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[.autowidth.stretch,cols="2,4,2,2,2,1"]
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|===
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|Symbol |Parameter |Min. |Typ. |Max. |Unit
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|V~IH(gpio)~ |High-level Input Voltage |*IOVREF*/2+0.3 | |VDDIO+0.3 |V
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|V~IL(gpio)~ |Low-level Input Voltage |-0.3 | |*IOVREF*/2-0.3 |V
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|R~PU/PD~ |Built-in pull Up/Down resistor | |60K | |ohm
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|IoH/IoL |GPIO driving capability |4^1)^ | |6^2)^ |mA
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|VOH |Output high level with 4 mA loading |VDDIO-0.5 | | |V
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|VOL |Output low level with 4 mA loading | | |0.4 |V
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|===
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NOTE: Minimal driving capability applies when VDDIO LV 1.71V, or VDDIO HV 3.0V, VOL<0.4V
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Maximal driving capability only applies to applications such as driving LED when VOL<0.6V.
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.Open Drain GPIO Specifications (For DIO_OD)
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[.autowidth.stretch,cols="2,4,2,2,2,1"]
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|===
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|Symbol |Parameter |Min. |Typ. |Max. |Unit
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|V~IH(OD5V)~ |High-level Input Voltage |2.2 | |5.5 |V
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|V~IL(OD5V)~ |Low-level Input Voltage |-0.3 | |0.8 |V
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|V~IH(OD3.3V)~ |High-level Input Voltage |2.2 | |3.6 |V
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|V~IL(OD3.3V)~ |Low-level Input Voltage |-0.3 | |0.8 |V
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|R~PU/PD~ |No built-in pull up/down resistor on OD IO |- |- |- |ohm
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|Io |OD IO driving low capability |4^1)^ | |6^2)^ |mA
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|VOL |Output low level with mini Io loading | | |0.4 |V
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|===
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NOTE: Minimal driving capability applies when VDDIO LV 1.71V, or VDDIO HV 3.0V, VOL<0.4V
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Maximal driving capability only applies to applications such as driving LED when VOL<0.6V.
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== Chapter 4. Pin Out
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.Pin out define of BPI-CM4
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[autowidth.stretch,cols=""]
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|===
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|divide
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|/
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|===
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<<<
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== Build
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This page was built by the following command:
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