From d94456608c06d36595376984491b3582102c0d3a Mon Sep 17 00:00:00 2001 From: Qubot <1445788683@qq.com> Date: Tue, 8 Aug 2023 09:58:45 +0800 Subject: [PATCH] first commit --- README.md | 0 arch/arm64/boot/dts/allwinner/Makefile | 4 +- .../allwinner/sun50i-h618-bananapi-m2h.dts | 376 ++++++++++++++++++ 3 files changed, 377 insertions(+), 3 deletions(-) create mode 100644 README.md create mode 100755 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m2h.dts diff --git a/README.md b/README.md new file mode 100644 index 000000000..e69de29bb diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 5dc2a0213..7e72e7b84 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -1,6 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb -dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero3.dtb -dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2w.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m2h.dtb subdir-y := $(dts-dirs) overlay diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m2h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m2h.dts new file mode 100755 index 000000000..ec6e70a50 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m2h.dts @@ -0,0 +1,376 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2020 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" + +#include +#include +#include + +/ { + model = "OrangePi Zero3"; + compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h616"; + + aliases { + ethernet0 = &emac0; + serial0 = &uart0; + serial5 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds: leds { + compatible = "gpio-leds"; + + led-red { + label = "red_led"; + gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ + linux,default-trigger = "none"; + }; + + led-green { + label = "green_led"; + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ + linux,default-trigger = "heartbeat"; + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc5v>; + enable-active-high; + gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ + status = "okay"; + }; + + reg_vcc33_wifi: vcc33-wifi { + /* Always on 3.3V regulator for WiFi and BT */ + compatible = "regulator-fixed"; + regulator-name = "vcc33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_vcc5v>; + }; + + reg_vcc_wifi_io: vcc-wifi-io { + /* Always on 1.8V/300mA regulator for WiFi and BT IO */ + compatible = "regulator-fixed"; + regulator-name = "vcc-wifi-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_vcc33_wifi>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "osc32k-out"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + post-power-on-delay-ms = <200>; + }; +}; + +&de { + status = "okay"; +}; + +&hdmi { + //hvcc-supply = <®_bldo1>; + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&gpu { + mali-supply = <®_dcdc1>; + status = "disabled"; +}; + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + allwinner,rx-delay-ps = <1800>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + motorcomm,clk-out-frequency-hz = <125000000>; + motorcomm,keep-pll-enabled; + motorcomm,auto-sleep-disabled; + }; +}; + +&mmc0 { + vmmc-supply = <®_dldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + max-frequency = <50000000>; + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <®_vcc33_wifi>; + vqmmc-supply = <®_vcc_wifi_io>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + mmc-ddr-1_8v; + status = "okay"; +}; + +&r_i2c { + status = "okay"; + + axp313a: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + wakeup-source; + + regulators{ + reg_dcdc1: dcdc1 { + regulator-name = "axp313a-dcdc1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1100000>; + regulator-step-delay-us = <25>; + regulator-final-delay-us = <50>; + regulator-always-on; + }; + + reg_dcdc2: dcdc2 { + regulator-name = "axp313a-dcdc2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1200000>; + regulator-step-delay-us = <25>; + regulator-final-delay-us = <50>; + regulator-ramp-delay = <200>; + regulator-always-on; + }; + + reg_dcdc3: dcdc3 { + regulator-name = "axp313a-dcdc3"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-step-delay-us = <25>; + regulator-final-delay-us = <50>; + regulator-always-on; + }; + + reg_aldo1: ldo1 { + regulator-name = "axp313a-aldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-step-delay-us = <25>; + regulator-final-delay-us = <50>; + regulator-always-on; + }; + + reg_dldo1: ldo2 { + regulator-name = "axp313a-dldo1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-step-delay-us = <25>; + regulator-final-delay-us = <50>; + regulator-always-on; + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; + +&ehci0 { + status = "disabled"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&ohci0 { + status = "disabled"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx_pin>; + status = "okay"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; +}; + +&i2c3 { + status = "disabled"; +}; + +&i2c4 { + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_ph_pins>; + status = "disabled"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_ph_pins>; + status = "disabled"; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; + + spidev@0 { + status = "disabled"; + compatible = "rohm,dh2228fv"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + + flash@0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&spi1 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; + + spidev@1 { + compatible = "rohm,dh2228fv"; + status = "disabled"; + reg = <1>; + spi-max-frequency = <1000000>; + }; +}; + +&codec { + allwinner,audio-routing = + "Line Out", "LINEOUT"; + status = "okay"; +}; + +&ahub_dam_plat { + status = "okay"; +}; + +&ahub_dam_mach { + status = "okay"; +}; + +&ahub1_plat { + status = "okay"; +}; + +&ahub1_mach { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; + status = "okay"; +};