add zero ,add emmc boot
This commit is contained in:
parent
3629c070c5
commit
ebe97fba0e
@ -646,7 +646,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
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sun50i-h6-pine-h64-model-b.dtb \
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sun50i-h6-tanix-tx6.dtb
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dtb-$(CONFIG_MACH_SUN50I_H616) += \
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sun50i-h616-bananapi-m4berry.dtb \
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sun50i-h618-bananapi-m4berry.dtb \
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sun50i-h618-bananapi-m4zero.dtb \
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sun50i-h616-orangepi-zero2.dtb \
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sun50i-h616-orangepi-zero2-b.dtb \
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sun50i-h616-orangepi-zero2-lts.dtb \
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@ -6,7 +6,7 @@
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/dts-v1/;
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#include "sun50i-h616.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/leds/common.h>
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@ -28,9 +28,9 @@
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 2 12 GPIO_ACTIVE_LOW>; /* PC12 */
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default-state = "on";
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};
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@ -45,6 +45,16 @@
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regulator-always-on;
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};
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reg_usb1_vbus: usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <®_vcc5v>;
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regulator-always-on;
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status = "okay";
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};
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};
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&ehci0 {
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@ -75,7 +85,7 @@
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};
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&mmc0 {
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vmmc-supply = <®_vcc3v3>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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bus-width = <4>;
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status = "okay";
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@ -85,8 +95,7 @@
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <®_vcc3v3>;
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vqmmc-supply = <®_vcc3v3>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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@ -174,3 +183,7 @@
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status = "okay";
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};
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&usbphy {
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usb1_vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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190
arch/arm/dts/sun50i-h618-bananapi-m4zero.dts
Normal file
190
arch/arm/dts/sun50i-h618-bananapi-m4zero.dts
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@ -0,0 +1,190 @@
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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/*
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* Copyright (C) 2020 Arm Ltd.
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*/
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/dts-v1/;
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#include "sun50i-h616.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Banana Pi M4 Zero";
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compatible = "bananapi,bananapi-m4zero", "allwinner,sun50i-h616";
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aliases {
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ethernet0 = &emac0;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 2 12 GPIO_ACTIVE_LOW>; /* PC12 */
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default-state = "on";
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};
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};
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reg_vcc5v: vcc5v {
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/* board wide 5V supply directly from the USB-C socket */
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compatible = "regulator-fixed";
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regulator-name = "vcc-5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_usb1_vbus: usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <®_vcc5v>;
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regulator-always-on;
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status = "okay";
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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/* USB 2 & 3 are on headers only. */
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&emac0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ext_rgmii_pins>;
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phy-mode = "rgmii";
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phy-handle = <&ext_rgmii_phy>;
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allwinner,rx-delay-ps = <3100>;
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allwinner,tx-delay-ps = <700>;
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status = "okay";
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};
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&mdio0 {
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mmc0 {
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&r_i2c {
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status = "okay";
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axp313a: pmic@36 {
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compatible = "x-powers,axp313a";
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status = "okay";
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reg = <0x36>;
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wakeup-source;
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standby_param: standby_param {
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vcc-dram = <0x4>;
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};
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regulators{
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reg_dcdc1: dcdc1 {
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regulator-name = "axp313a-dcdc1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-step-delay-us = <25>;
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regulator-final-delay-us = <50>;
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regulator-always-on;
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};
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reg_dcdc2: dcdc2 {
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regulator-name = "axp313a-dcdc2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1540000>;
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regulator-step-delay-us = <25>;
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regulator-final-delay-us = <50>;
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regulator-ramp-delay = <200>;
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regulator-always-on;
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};
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reg_dcdc3: dcdc3 {
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regulator-name = "axp313a-dcdc3";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-step-delay-us = <25>;
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regulator-final-delay-us = <50>;
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regulator-always-on;
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};
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reg_aldo1: aldo1 {
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regulator-name = "axp313a-aldo1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-step-delay-us = <25>;
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regulator-final-delay-us = <50>;
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regulator-always-on;
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};
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reg_dldo1: dldo1 {
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regulator-name = "axp313a-dldo1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-step-delay-us = <25>;
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regulator-final-delay-us = <50>;
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regulator-always-on;
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};
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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&usbotg {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usbphy {
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usb1_vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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@ -119,6 +119,7 @@ struct sunxi_mmc {
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#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8)
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#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9)
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#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10)
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#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff)
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#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31)
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@ -582,7 +582,7 @@ static void mmc_pinmux_setup(int sdc)
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continue;
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sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
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sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
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sunxi_gpio_set_drv(pin, 2);
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sunxi_gpio_set_drv(pin, 3);
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}
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#elif defined(CONFIG_MACH_SUN9I)
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/* SDC2: PC6-PC16 */
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@ -1,6 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-bananapi-m4berry"
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-bananapi-m4berry"
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CONFIG_SPL=y
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CONFIG_DRAM_CLK=792
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CONFIG_SUNXI_DRAM_H616_LPDDR4=y
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18
configs/bananapi_m4zero_defconfig
Normal file
18
configs/bananapi_m4zero_defconfig
Normal file
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-bananapi-m4zero"
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CONFIG_SPL=y
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CONFIG_DRAM_CLK=792
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CONFIG_SUNXI_DRAM_H616_LPDDR4=y
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CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y
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CONFIG_DRAM_SUN50I_H616_UNKNOWN_FEATURE=y
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CONFIG_DRAM_SUN50I_H616_BIT_DELAY_COMPENSATION=y
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# CONFIG_DRAM_SUN50I_H616_TRIM_SIZE is not set
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CONFIG_MACH_SUN50I_H616=y
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CONFIG_MMC0_CD_PIN="PF6"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_R_I2C_ENABLE=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_AXP_DCDC3_VOLT=1100
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_AXP313A_POWER=y
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@ -86,6 +86,7 @@ static int mmc_resource_init(int sdc_no)
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}
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priv->mmc_no = sdc_no;
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#ifdef BPI
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cd_pin = sunxi_mmc_getcd_gpio(sdc_no);
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if (cd_pin >= 0) {
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ret = gpio_request(cd_pin, "mmc_cd");
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@ -94,6 +95,12 @@ static int mmc_resource_init(int sdc_no)
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ret = gpio_direction_input(cd_pin);
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}
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}
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#else
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if(1) {
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printf("BPI: skip sunxi_mmc_getcd_gpio %d\n", sdc_no);
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ret=0;
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}
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#endif
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return ret;
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}
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@ -303,8 +310,9 @@ static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
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SUNXI_MMC_STATUS_FIFO_FULL;
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unsigned i;
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unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
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unsigned byte_cnt = data->blocksize * data->blocks;
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unsigned timeout_msecs = byte_cnt >> 8;
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unsigned word_cnt = (data->blocksize * data->blocks) >> 2;
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unsigned timeout_msecs = word_cnt >> 6;
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uint32_t status;
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unsigned long start;
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if (timeout_msecs < 2000)
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@ -315,16 +323,42 @@ static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
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start = get_timer(0);
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for (i = 0; i < (byte_cnt >> 2); i++) {
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while (readl(&priv->reg->status) & status_bit) {
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for (i = 0; i < word_cnt;) {
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unsigned int in_fifo;
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while ((status = readl(&priv->reg->status)) & status_bit) {
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if (get_timer(start) > timeout_msecs)
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return -1;
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}
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if (reading)
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buff[i] = readl(&priv->reg->fifo);
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else
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writel(buff[i], &priv->reg->fifo);
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/*
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* For writing we do not easily know the FIFO size, so have
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* to check the FIFO status after every word written.
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* TODO: For optimisation we could work out a minimum FIFO
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* size across all SoCs, and use that together with the current
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* fill level to write chunks of words.
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*/
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if (!reading) {
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writel(buff[i++], &priv->reg->fifo);
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continue;
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}
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/*
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* The status register holds the current FIFO level, so we
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* can be sure to collect as many words from the FIFO
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* register without checking the status register after every
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* read. That saves half of the costly MMIO reads, effectively
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* doubling the read performance.
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* Some SoCs (A20) report a level of 0 if the FIFO is
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* completely full (value masked out?). Use a safe minimal
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* FIFO size in this case.
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*/
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in_fifo = SUNXI_MMC_STATUS_FIFO_LEVEL(status);
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if (in_fifo == 0 && (status & SUNXI_MMC_STATUS_FIFO_FULL))
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in_fifo = 32;
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for (; in_fifo > 0; in_fifo--)
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buff[i++] = readl_relaxed(&priv->reg->fifo);
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dmb();
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}
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return 0;
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@ -531,6 +565,17 @@ struct mmc *sunxi_mmc_init(int sdc_no)
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cfg->f_min = 400000;
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cfg->f_max = 52000000;
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#ifdef BPI
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#else
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printf("BPI: init mmc %d clock(%d) and io\n", sdc_no, cfg->f_max);
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if(sdc_no==2) {
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cfg->f_max = 2000000;
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cfg->f_max = 12000000;
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cfg->f_max = 8000000;
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printf("BPI: init mmc %d clock(%d) and io\n", sdc_no, cfg->f_max);
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}
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#endif
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if (mmc_resource_init(sdc_no) != 0)
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return NULL;
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@ -633,6 +678,15 @@ static int sunxi_mmc_probe(struct udevice *dev)
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cfg->f_min = 400000;
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cfg->f_max = 52000000;
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#ifdef BPI
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else
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if (bus_width == 8) {
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cfg->f_max = 2000000;
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cfg->f_max = 12000000;
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cfg->f_max = 8000000;
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printf("BPI: init mmc %d clock(%d) and io\n", 2, cfg->f_max);
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}
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#endif
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priv->reg = (void *)dev_read_addr(dev);
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