update wm8960 driver
This commit is contained in:
August
parent
38ec662a66
commit
6b35b109f4
@ -405,6 +405,7 @@ SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
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};
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static const struct snd_soc_dapm_route audio_paths[] = {
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{ "Left Boost Mixer", NULL , "MICB"},
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{ "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
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{ "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
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{ "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
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@ -414,6 +415,7 @@ static const struct snd_soc_dapm_route audio_paths[] = {
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{ "Left Input Mixer", NULL, "LINPUT2" },
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{ "Left Input Mixer", NULL, "LINPUT3" },
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{ "Right Boost Mixer", NULL , "MICB"},
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{ "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
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{ "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
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{ "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
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@ -601,161 +603,155 @@ static const int bclk_divs[] = {
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120, 160, 220, 240, 320, 320, 320
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};
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/**
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* wm8960_configure_sysclk - checks if there is a sysclk frequency available
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* The sysclk must be chosen such that:
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* - sysclk = MCLK / sysclk_divs
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* - lrclk = sysclk / dac_divs
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* - 10 * bclk = sysclk / bclk_divs
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*
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* If we cannot find an exact match for (sysclk, lrclk, bclk)
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* triplet, we relax the bclk such that bclk is chosen as the
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* closest available frequency greater than expected bclk.
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*
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* @wm8960_priv: wm8960 codec private data
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* @mclk: MCLK used to derive sysclk
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* @sysclk_idx: sysclk_divs index for found sysclk
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* @dac_idx: dac_divs index for found lrclk
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* @bclk_idx: bclk_divs index for found bclk
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*
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* Returns:
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* -1, in case no sysclk frequency available found
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* >=0, in case we could derive bclk and lrclk from sysclk using
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* (@sysclk_idx, @dac_idx, @bclk_idx) dividers
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*/
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static
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int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
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int *sysclk_idx, int *dac_idx, int *bclk_idx)
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{
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int sysclk, bclk, lrclk;
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int i, j, k;
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int diff, closest = mclk;
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/* marker for no match */
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*bclk_idx = -1;
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bclk = wm8960->bclk;
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lrclk = wm8960->lrclk;
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/* check if the sysclk frequency is available. */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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if (sysclk_divs[i] == -1)
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continue;
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sysclk = mclk / sysclk_divs[i];
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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if (sysclk != dac_divs[j] * lrclk)
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continue;
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for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
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diff = sysclk - bclk * bclk_divs[k] / 10;
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if (diff == 0) {
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*sysclk_idx = i;
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*dac_idx = j;
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*bclk_idx = k;
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break;
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}
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if (diff > 0 && closest > diff) {
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*sysclk_idx = i;
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*dac_idx = j;
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*bclk_idx = k;
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closest = diff;
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}
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}
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if (k != ARRAY_SIZE(bclk_divs))
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break;
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}
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if (j != ARRAY_SIZE(dac_divs))
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break;
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}
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return *bclk_idx;
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}
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/**
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* wm8960_configure_pll - checks if there is a PLL out frequency available
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* The PLL out frequency must be chosen such that:
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* - sysclk = lrclk * dac_divs
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* - freq_out = sysclk * sysclk_divs
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* - 10 * sysclk = bclk * bclk_divs
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*
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* If we cannot find an exact match for (sysclk, lrclk, bclk)
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* triplet, we relax the bclk such that bclk is chosen as the
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* closest available frequency greater than expected bclk.
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*
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* @component: component structure
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* @freq_in: input frequency used to derive freq out via PLL
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* @sysclk_idx: sysclk_divs index for found sysclk
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* @dac_idx: dac_divs index for found lrclk
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* @bclk_idx: bclk_divs index for found bclk
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*
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* Returns:
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* < 0, in case no PLL frequency out available was found
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* >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
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* (@sysclk_idx, @dac_idx, @bclk_idx) dividers
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*/
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static
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int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
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int *sysclk_idx, int *dac_idx, int *bclk_idx)
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{
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struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
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int sysclk, bclk, lrclk, freq_out;
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int diff, closest, best_freq_out;
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int i, j, k;
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bclk = wm8960->bclk;
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lrclk = wm8960->lrclk;
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closest = freq_in;
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best_freq_out = -EINVAL;
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*sysclk_idx = *dac_idx = *bclk_idx = -1;
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/*
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* From Datasheet, the PLL performs best when f2 is between
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* 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
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* or 12.288MHz, then sysclkdiv = 2 is the best choice.
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* So search sysclk_divs from 2 to 1 other than from 1 to 2.
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*/
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for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
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if (sysclk_divs[i] == -1)
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continue;
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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sysclk = lrclk * dac_divs[j];
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freq_out = sysclk * sysclk_divs[i];
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for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
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if (!is_pll_freq_available(freq_in, freq_out))
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continue;
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diff = sysclk - bclk * bclk_divs[k] / 10;
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if (diff == 0) {
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*sysclk_idx = i;
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*dac_idx = j;
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*bclk_idx = k;
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return freq_out;
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}
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if (diff > 0 && closest > diff) {
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*sysclk_idx = i;
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*dac_idx = j;
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*bclk_idx = k;
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closest = diff;
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best_freq_out = freq_out;
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}
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}
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}
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}
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return best_freq_out;
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}
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static int wm8960_configure_clocking(struct snd_soc_component *component)
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{
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struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
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int freq_out, freq_in;
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int sysclk, bclk, lrclk, freq_out, freq_in;
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u16 iface1 = snd_soc_component_read32(component, WM8960_IFACE1);
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int i, j, k;
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int ret;
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if (!(iface1 & (1<<6))) {
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dev_dbg(component->dev,
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"Codec is slave mode, no need to configure clock\n");
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return 0;
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//return 0;
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}
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if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
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@ -764,6 +760,11 @@ static int wm8960_configure_clocking(struct snd_soc_component *component)
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}
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freq_in = wm8960->freq_in;
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bclk = wm8960->bclk;
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lrclk = wm8960->lrclk;
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//printk("clk_id %d freq_in: %d bclk: %d lrclk: %d\n",wm8960->clk_id ,freq_in, bclk,lrclk);
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/*
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* If it's sysclk auto mode, check if the MCLK can provide sysclk or
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* not. If MCLK can provide sysclk, using MCLK to provide sysclk
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@ -782,21 +783,61 @@ static int wm8960_configure_clocking(struct snd_soc_component *component)
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}
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if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
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ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
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if (ret >= 0) {
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/* check if the sysclk frequency is available. */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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if (sysclk_divs[i] == -1)
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continue;
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sysclk = freq_out / sysclk_divs[i];
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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if (sysclk != dac_divs[j] * lrclk)
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continue;
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for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
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if (sysclk == bclk * bclk_divs[k] / 10)
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break;
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if (k != ARRAY_SIZE(bclk_divs))
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break;
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}
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if (j != ARRAY_SIZE(dac_divs))
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break;
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}
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if (i != ARRAY_SIZE(sysclk_divs)) {
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goto configure_clock;
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} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
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dev_err(component->dev, "failed to configure clock\n");
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return -EINVAL;
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}
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}
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/* get a available pll out frequency and set pll */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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if (sysclk_divs[i] == -1)
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continue;
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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sysclk = lrclk * dac_divs[j];
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freq_out = sysclk * sysclk_divs[i];
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freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
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if (freq_out < 0) {
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dev_err(component->dev, "failed to configure clock via PLL\n");
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return freq_out;
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for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
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if (sysclk == bclk * bclk_divs[k] / 10 &&
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is_pll_freq_available(freq_in, freq_out)) {
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wm8960_set_pll(component,
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freq_in, freq_out);
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break;
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} else {
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continue;
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}
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}
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if (k != ARRAY_SIZE(bclk_divs))
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break;
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}
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if (j != ARRAY_SIZE(dac_divs))
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break;
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}
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wm8960_set_pll(component, freq_in, freq_out);
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if (i == ARRAY_SIZE(sysclk_divs)) {
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dev_err(component->dev, "failed to configure clock\n");
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return -EINVAL;
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}
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configure_clock:
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/* configure sysclk clock */
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@ -842,7 +883,7 @@ static int wm8960_hw_params(struct snd_pcm_substream *substream,
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iface |= 0x000c;
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break;
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}
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/* fall through */
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fallthrough;
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default:
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dev_err(component->dev, "unsupported width %d\n",
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params_width(params));
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@ -884,7 +925,7 @@ static int wm8960_hw_free(struct snd_pcm_substream *substream,
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return 0;
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}
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static int wm8960_mute(struct snd_soc_dai *dai, int mute)
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static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct snd_soc_component *component = dai->component;
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@ -1290,6 +1331,7 @@ static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
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{
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struct snd_soc_component *component = dai->component;
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struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
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clk_id = WM8960_SYSCLK_PLL;
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switch (clk_id) {
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case WM8960_SYSCLK_MCLK:
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@ -1306,6 +1348,7 @@ static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
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return -EINVAL;
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}
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wm8960->freq_in = 24000000;
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wm8960->sysclk = freq;
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wm8960->clk_id = clk_id;
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@ -1321,7 +1364,7 @@ static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
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static const struct snd_soc_dai_ops wm8960_dai_ops = {
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.hw_params = wm8960_hw_params,
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.hw_free = wm8960_hw_free,
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.digital_mute = wm8960_mute,
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.mute_stream = wm8960_mute,
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.set_fmt = wm8960_set_dai_fmt,
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.set_clkdiv = wm8960_set_dai_clkdiv,
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.set_pll = wm8960_set_dai_pll,
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@ -1370,7 +1413,6 @@ static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
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.idle_bias_on = 1,
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.use_pmdown_time = 1,
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.endianness = 1,
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.non_legacy_dai_naming = 1,
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};
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static const struct regmap_config wm8960_regmap = {
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@ -1410,18 +1452,11 @@ static int wm8960_i2c_probe(struct i2c_client *i2c,
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if (wm8960 == NULL)
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return -ENOMEM;
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wm8960->clk_id = WM8960_SYSCLK_PLL;
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wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
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if (IS_ERR(wm8960->mclk)) {
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if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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} else {
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ret = clk_get_rate(wm8960->mclk);
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if (ret >= 0) {
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wm8960->freq_in = ret;
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} else {
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dev_err(&i2c->dev, "Failed to read MCLK rate: %d\n",
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ret);
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}
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}
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wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
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@ -1,6 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* wm8960.h -- WM8960 Soc Audio driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _WM8960_H
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@ -39,7 +39,7 @@ static int sunxi_ahub_dai_startup(struct snd_pcm_substream *substream,
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struct regmap *regmap = NULL;
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unsigned int apb_num, tdm_num;
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SND_LOG_DEBUG(HLOG, "\n");
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pr_err("BPI, %s\n", __func__);
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regmap = ahub_info->mem_info.regmap;
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apb_num = ahub_info->dts_info.apb_num;
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@ -938,7 +938,7 @@ static void sunxi_ahub_dai_shutdown(struct snd_pcm_substream *substream,
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struct regmap *regmap = NULL;
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unsigned int apb_num, tdm_num;
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SND_LOG_DEBUG(HLOG, "\n");
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pr_err("BPI, %s\n", __func__);
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regmap = ahub_info->mem_info.regmap;
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apb_num = ahub_info->dts_info.apb_num;
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