534 lines
15 KiB
C
534 lines
15 KiB
C
/*
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* (C) Copyright 2014-2019
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* allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* caiyongheng <caiyongheng@allwinnertech.com>
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*
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* some simple description for this code
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <mapmem.h>
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#include <fdtdec.h>
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#include <fdt_support.h>
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#include <sys_config.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/arch/dma.h>
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#include "sun55iw3-codec.h"
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#include "sunxi_rw_func.h"
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#if 0
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#define codec_dbg(fmt, arg...) printf("[%s:%d] " fmt "\n", __FUNCTION__, __LINE__, ##arg)
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#define sunxi_boot_codec_debug
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#else
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#define codec_dbg(fmt, arg...)
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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struct sunxi_codec {
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void __iomem *addr_clkbase;
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void __iomem *addr_clkdspbase;
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void __iomem *addr_dbase;
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void __iomem *addr_abase;
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user_gpio_set_t spk_cfg;
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u32 lineout_vol;
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u32 spk_gpio;
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u32 pa_ctl_level;
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};
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static struct sunxi_codec g_codec;
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#if 0
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static int sunxi_codec_read(struct sunxi_codec *codec, u32 reg)
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{
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if (reg >= SUNXI_PR_CFG) {
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/* Analog part */
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reg = reg - SUNXI_PR_CFG;
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return read_prcm_wvalue(reg, codec->addr_abase);
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} else {
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return codec_rdreg(codec->addr_dbase + reg);
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}
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return 0;
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}
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#endif
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static int sunxi_codec_write(struct sunxi_codec *codec, u32 reg, u32 val)
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{
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codec_wrreg(codec->addr_dbase + reg, val);
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return 0;
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}
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static int sunxi_codec_update_bits(struct sunxi_codec *codec, u32 reg, u32 mask,
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u32 val)
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{
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codec_wrreg_bits(codec->addr_dbase + reg, mask, val);
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return 0;
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}
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static const struct sample_rate sample_rate_conv[] = {
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{44100, 0},
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{48000, 0},
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{8000, 5},
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{32000, 1},
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{22050, 2},
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{24000, 2},
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{16000, 3},
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{11025, 4},
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{12000, 4},
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{192000, 6},
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{96000, 7},
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};
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/*
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* sample bits
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* sample rate
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* channels
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*
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*/
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int sunxi_codec_hw_params(u32 sb, u32 sr, u32 ch)
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{
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int i;
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struct sunxi_codec *codec = &g_codec;
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/*
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* Audio codec
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* SUNXI_DAC_FIFO_CTL 0xF0
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* SUNXI_DAC_DPC 0x00
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*
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*/
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/* set playback sample resolution, only little endian*/
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switch (sb) {
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case 16:
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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0x3 << DAC_FIFO_MODE, 0x3 << DAC_FIFO_MODE);
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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0x1 << TX_SAMPLE_BITS, 0x0 << TX_SAMPLE_BITS);
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break;
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case 24:
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case 32:
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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0x3 << DAC_FIFO_MODE, 0x0 << DAC_FIFO_MODE);
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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0x1 << TX_SAMPLE_BITS, 0x1 << TX_SAMPLE_BITS);
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break;
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default:
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return -1;
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}
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/* set playback sample rate */
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for (i = 0; i < ARRAY_SIZE(sample_rate_conv); i++) {
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if (sample_rate_conv[i].samplerate == sr) {
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL, 0x7 << DAC_FS,
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(sample_rate_conv[i].rate_bit << DAC_FS));
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}
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}
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/* set playback channels */
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if (ch == 1) {
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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(1 << DAC_MONO_EN), (1 << DAC_MONO_EN));
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} else if (ch == 2) {
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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(1 << DAC_MONO_EN), (0 << DAC_MONO_EN));
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} else {
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printf("channel:%u is not support!\n", ch);
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}
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return 0;
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}
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static int sunxi_codec_init(struct sunxi_codec *codec)
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{
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void __iomem *cfg_reg;
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volatile u32 tmp_val = 0;
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/*
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* CCMU register 24576000
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* BASE 0x0200 1000
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* PLL_PERI0_CTRL_REG 0x20
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* PLL_AUDIO_CTRL_REG 0x78
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* PLL_AUDIO_PAT0_CTRL_REG 0x178
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* PLL_AUDIO_PAT1_CTRL_REG 0x17C
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* PLL_AUDIO_BIAS_REG 0x378
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* DSP_CLK_REG 0xC70
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*/
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cfg_reg = codec->addr_clkbase + 0x20;
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tmp_val = 0xF8216310;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkbase + 0x78;
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tmp_val = 0xE8145500; //0xF9015900;
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writel(tmp_val, cfg_reg);
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/*printf("reg:0x%08x, before: 0x%x, after:0x%x\n", cfg_reg, val, tmp_val);*/
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cfg_reg = codec->addr_clkbase + 0x178;
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tmp_val = 0xA000A234;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkbase + 0x17C;
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tmp_val = 0x0;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkbase + 0x378;
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tmp_val = 0x00030000;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkbase + 0xC70;
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tmp_val = 0x83000001;
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writel(tmp_val, cfg_reg);
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codec_dbg("0x02001020 %x 0x02001078 %x 0x02001178 %x 0x02001C70 %x\n", \
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readl(codec->addr_clkbase + 0x20), readl(codec->addr_clkbase + 0x78), \
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readl(codec->addr_clkbase + 0x178), readl(codec->addr_clkbase + 0xC70));
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/*
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* DSP CCMU register 22579200
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* BASE 0x0710 2000
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* PLL_AUDIO_CTRL_REG 0x0C
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* PLL_AUDIO_PAT0_CTRL_REG 0x10
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* PLL_AUDIO_PAT1_CTRL_REG 0x14
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* PLL_AUDIO_BIAS_REG 0x18
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* AUD_CLK_REG 0x1C
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* DSP_CLK_REG 0x20
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* AUDIO_CODEC_DAC_CLK_REG 0x58
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* AUDIO_CODEC_BGR_REG 0x60
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*/
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cfg_reg = codec->addr_clkdspbase + 0x0C;
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tmp_val = 0xF8417F00;
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writel(tmp_val, cfg_reg);
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/*printf("reg:0x%08x, before: 0x%x, after:0x%x\n", cfg_reg, val, tmp_val);*/
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cfg_reg = codec->addr_clkdspbase + 0x10;
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tmp_val = 0x0;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x14;
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tmp_val = 0x0;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x18;
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tmp_val = 0x00030000;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x1C;
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tmp_val = 0x0;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x20;
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tmp_val = 0x83000003;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x60;
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tmp_val = 0x00010000;
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writel(tmp_val, cfg_reg);
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tmp_val = 0x00010001;
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writel(tmp_val, cfg_reg);
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cfg_reg = codec->addr_clkdspbase + 0x58;
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tmp_val = 0x80000003; //0x80000163; //0x8200001b;
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writel(tmp_val, cfg_reg);
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codec_dbg("0x0710200C %x 0x07102018 %x 0x07102058 %x 0x07102060 %x\n", \
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readl(codec->addr_clkdspbase + 0x0C), readl(codec->addr_clkdspbase + 0x18), \
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readl(codec->addr_clkdspbase + 0x58), readl(codec->addr_clkdspbase + 0x60));
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/*
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* Audio codec
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* SUNXI_DAC_DAP_CTL 0xF0
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* SUNXI_DAC_DPC 0x00
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*
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*/
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/* Enable DAC DAP */
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sunxi_codec_update_bits(codec, SUNXI_DAC_DAP_CTL, 0x1 << DDAP_EN, 0x1 << DDAP_EN);
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/* cpvcc set 1.2V, analog power for headphone charge pump */
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x1 << CPLDO_EN, 0x1 << CPLDO_EN);
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x3 << CPLDO_VOLTAGE, 0x3 << CPLDO_VOLTAGE);
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/* Open VRP to remove noise */
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sunxi_codec_update_bits(codec, SUNXI_POWER_AN_CTL, 0x1 << VRP_LDO_EN, 0x1 << VRP_LDO_EN);
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/* set digital volume 0x0, 0*-1.16 = 0dB */
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sunxi_codec_update_bits(codec, SUNXI_DAC_DPC, (0x3F << DVOL), (0x0 << DVOL));
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/* set digital L/R volume */
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sunxi_codec_update_bits(codec, SUNXI_DAC_VOL_CTL, 0xFF << DAC_VOL_L, (0xC0 << DAC_VOL_L));
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sunxi_codec_update_bits(codec, SUNXI_DAC_VOL_CTL, 0xFF << DAC_VOL_R, (0xC0 << DAC_VOL_R));
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/* set LINEOUT volume, such as 0x19, -(31-0x19)*1.5 = -9dB */
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x1F << LINEOUT_GAIN, (codec->lineout_vol << LINEOUT_GAIN));
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/* set HPOUT volume 0-7 */
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x7 << HEADPHONE_GAIN, 0x7 << HEADPHONE_GAIN);
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return 0;
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}
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#if 1
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fdt_addr_t new_fdtdec_get_addr_size_fixed(const void *blob, int node,
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const char *prop_name, int index, int na,
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int ns, fdt_size_t *sizep,
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bool translate)
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{
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const fdt32_t *prop, *prop_end;
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const fdt32_t *prop_addr, *prop_size, *prop_after_size;
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int len;
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fdt_addr_t addr;
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prop = fdt_getprop(blob, node, prop_name, &len);
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if (!prop) {
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debug("(not found)\n");
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return FDT_ADDR_T_NONE;
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}
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prop_end = prop + (len / sizeof(*prop));
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prop_addr = prop + (index * (na + ns));
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prop_size = prop_addr + na;
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prop_after_size = prop_size + ns;
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if (prop_after_size > prop_end) {
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debug("(not enough data: expected >= %d cells, got %d cells)\n",
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(u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
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return FDT_ADDR_T_NONE;
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}
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#if CONFIG_IS_ENABLED(OF_TRANSLATE)
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if (translate)
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addr = fdt_translate_address(blob, node, prop_addr);
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else
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#endif
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addr = fdtdec_get_number(prop_addr, na);
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if (sizep) {
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*sizep = fdtdec_get_number(prop_size, ns);
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debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
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(unsigned long long)*sizep);
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} else {
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debug("addr=%08llx\n", (unsigned long long)addr);
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}
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return addr;
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}
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#else
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#define new_fdtdec_get_addr_size_fixed fdtdec_get_addr_size_fixed
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#endif
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static int get_sunxi_codec_values(struct sunxi_codec *codec, const void *blob)
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{
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int node, ret;
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fdt_addr_t addr = 0;
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fdt_size_t size = 0;
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/* Get ccu clock (parent clock) */
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node = fdt_node_offset_by_compatible(blob, 0, "allwinner,clk-init");
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if (node < 0) {
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printf("unable to find allwinner,ccu node in device tree.\n");
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return node;
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}
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addr = new_fdtdec_get_addr_size_fixed(blob, node, "reg", 0, 2, 2, &size, false);
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codec->addr_clkbase = map_sysmem(addr, size);
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/* Get dsp ccu clock */
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addr = new_fdtdec_get_addr_size_fixed(blob, node, "reg", 3, 2, 2, &size, false);
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codec->addr_clkdspbase = map_sysmem(addr, size);
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codec_dbg("clkbase:0x%p, clkdspbase:0x%p\n", codec->addr_clkbase, codec->addr_clkdspbase);
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node = fdt_node_offset_by_compatible(blob, 0, "allwinner,sunxi-internal-codec");
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if (node < 0) {
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printf("unable to find allwinner,sunxi-snd-codec node in device tree.\n");
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return node;
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}
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if (!fdtdec_get_is_enabled(blob, node)) {
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printf("sunxi-snd-codec disabled in device tree.\n");
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return -1;
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}
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/*regs = fdtdec_get_addr();*/
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addr = new_fdtdec_get_addr_size_fixed(blob, node, "reg", 0, 2, 2, &size, false);
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codec->addr_dbase = map_sysmem(addr, size);
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addr = new_fdtdec_get_addr_size_fixed(blob, node, "reg", 1, 2, 2, &size, false);
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codec->addr_abase = map_sysmem(addr, size);
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codec_dbg("dbase:0x%p, abase:0x%p\n", codec->addr_dbase, codec->addr_abase);
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ret = fdt_getprop_u32(blob, node, "lineout_vol", &codec->lineout_vol);
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if (ret < 0) {
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printf("lineout_gain not set. default 0x1a\n");
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codec->lineout_vol = 0x1a;
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}
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ret = fdt_getprop_u32(blob, node, "pa_level", &codec->pa_ctl_level);
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if (ret < 0) {
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printf("pa_ctl_level not set. default 1\n");
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codec->pa_ctl_level = 1;
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}
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ret = fdt_get_one_gpio_by_offset(node, "gpio-spk", &codec->spk_cfg);
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if (ret < 0 || codec->spk_cfg.port == 0) {
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printf("parser gpio-spk failed, ret:%d, port:%u\n", ret, codec->spk_cfg.port);
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return -1;
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}
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codec->spk_gpio = (codec->spk_cfg.port - 1) * 32 + codec->spk_cfg.port_num;
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gpio_request(codec->spk_gpio, NULL);
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#if 1
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codec_dbg("pa_ctl_level:%u, port:%u, num:%u, gpio:%u\n",
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codec->pa_ctl_level, codec->spk_cfg.port,
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codec->spk_cfg.port_num, codec->spk_gpio);
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#endif
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return 0;
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}
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int sunxi_codec_playback_prepare(void)
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{
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struct sunxi_codec *codec = &g_codec;
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/* RMC Enable */
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sunxi_codec_update_bits(codec, SUNXI_RAMP, 0x1 << 1, 0x1 << 1);
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/* FIFO flush, clear pending, clear sample counter */
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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0x1 << DAC_FIFO_FLUSH, 0x1 << DAC_FIFO_FLUSH);
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sunxi_codec_write(codec, SUNXI_DAC_FIFO_STA,
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0x1 << DAC_TXE_INT | 0x1 << DAC_TXU_INT | 0x1 << DAC_TXO_INT);
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sunxi_codec_write(codec, SUNXI_DAC_CNT, 0x0);
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/* enable FIFO empty DRQ */
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sunxi_codec_update_bits(codec, SUNXI_DAC_FIFO_CTL,
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(1 << DAC_DRQ_EN), (1 << DAC_DRQ_EN));
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/* Enable DAC analog left/Right channel */
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG,
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(0x1 << DACL_EN), (0x1 << DACL_EN));
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG,
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(0x1 << DACR_EN), (0x1 << DACR_EN));
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/* enable DAC digital part */
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sunxi_codec_update_bits(codec, SUNXI_DAC_DPC,
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(0x1 << DAC_DIG_EN), (0x1 << DAC_DIG_EN));
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/* enable left and right LINEOUT */
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x1 << LMUTE, 0x1 << LMUTE);
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG,
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(0x1 << LINEOUTL_EN), (0x1 << LINEOUTL_EN));
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG, 0x1 << RMUTE, 0x1 << RMUTE);
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sunxi_codec_update_bits(codec, SUNXI_DAC_AN_REG,
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(0x1 << LINEOUTR_EN), (0x1 << LINEOUTR_EN));
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/* enable HPOUT */
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sunxi_codec_update_bits(codec, SUNXI_HP_AN_CTL, 0x1 << HPPA_EN, 0x1 << HPPA_EN);
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/* increase delay time, if Pop occured */
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mdelay(10);
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gpio_direction_output(codec->spk_gpio, codec->pa_ctl_level);
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//sunxi_codec_write(codec, SUNXI_DAC_DEBUG, 0xB00);
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codec_dbg("0x07110000 [%x] 0x07110004 [%x] 0x07110010 [%x] 0x07110014 [%x] \n \
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0x07110024 [%x] 0x07110028 [%x] 0x07110310 [%x] 0x07110320 [%x] 0x07110324 [%x] \n", \
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readl(codec->addr_dbase), readl(codec->addr_dbase + 0x04), readl(codec->addr_dbase + 0x10), readl(codec->addr_dbase + 0x14),\
|
|
readl(codec->addr_dbase + 0x24), readl(codec->addr_dbase + 0x28), readl(codec->addr_dbase + 0x310), readl(codec->addr_dbase + 0x320), readl(codec->addr_dbase + 0x324));
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int sunxi_codec_playback_debug(void)
|
|
{
|
|
#ifdef sunxi_boot_codec_debug
|
|
struct sunxi_codec *codec = &g_codec;
|
|
|
|
struct sunxi_gpio_reg *const gpio_reg = (struct sunxi_gpio_reg *)SUNXI_PIO_BASE;
|
|
struct sunxi_gpio *pio = &gpio_reg->gpio_bank[7];
|
|
#endif
|
|
|
|
codec_dbg("gpio7 [%p] cfg0 [%p] dat[%p] drv0[%p] pull0[%p]\n \
|
|
0x2000150 [%x] 0x2000160 [%x] 0x2000164 [%x] 0x2000174 [%x] \n\n", \
|
|
&gpio_reg->gpio_bank[7], &pio->cfg[0], &pio->dat, &pio->drv[0], &pio->pull[0], \
|
|
readl(&pio->cfg[0]), readl(&pio->dat), readl(&pio->drv[0]), readl(&pio->pull[0]));
|
|
|
|
int i = 0;
|
|
|
|
for (i = 0; i < 5; i++) {
|
|
/* ccu */
|
|
codec_dbg("0x02001020 [%x] 0x02001078 [%x] 0x02001178 [%x] \n \
|
|
0x02001378 [%x] 0x02001C70 [%x] \n\n", \
|
|
readl(codec->addr_clkbase + 0x20), readl(codec->addr_clkbase + 0x78), readl(codec->addr_clkbase + 0x178), \
|
|
readl(codec->addr_clkbase + 0x378), readl(codec->addr_clkbase + 0xC70));
|
|
|
|
/* dsp ccu */
|
|
|
|
codec_dbg("0x0710200C [%x] 0x07102020 [%x] 0x07102058 [%x] \n \
|
|
0x07102060 [%x] 0x07102104 [%x] 0x0710211C [%x] \n\n", \
|
|
readl(codec->addr_clkdspbase + 0x0C), readl(codec->addr_clkdspbase + 0x20), readl(codec->addr_clkdspbase + 0x58), \
|
|
readl(codec->addr_clkdspbase + 0x60), readl(codec->addr_clkdspbase + 0x104), readl(codec->addr_clkdspbase + 0x11C));
|
|
|
|
/* audiocodec */
|
|
|
|
codec_dbg("0x07110000 [%x] 0x07110010 [%x] 0x07110014 [%x] 0x07110024 [%x] 0x0711031C [%x]\n", \
|
|
readl(codec->addr_dbase), readl(codec->addr_dbase + 0x10), readl(codec->addr_dbase + 0x14), readl(codec->addr_dbase + 0x24), \
|
|
readl(codec->addr_dbase + 0x31C));
|
|
|
|
mdelay(200);
|
|
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int sunxi_codec_probe(void)
|
|
{
|
|
|
|
int ret;
|
|
struct sunxi_codec *codec = &g_codec;
|
|
const void *blob = gd->fdt_blob;
|
|
|
|
codec_dbg("blob %p\n", blob);
|
|
|
|
if (get_sunxi_codec_values(codec, blob) < 0) {
|
|
debug("FDT Codec values failed\n");
|
|
return -1;
|
|
}
|
|
|
|
ret = sunxi_codec_init(codec);
|
|
|
|
return ret;
|
|
}
|
|
|
|
void sunxi_codec_fill_txfifo(u32 *data)
|
|
{
|
|
struct sunxi_codec *codec = &g_codec;
|
|
|
|
sunxi_codec_write(codec, SUNXI_DAC_TXDATA, *data);
|
|
}
|
|
|
|
int sunxi_codec_playback_start(ulong handle, u32 *srcBuf, u32 cnt)
|
|
{
|
|
int ret = 0;
|
|
struct sunxi_codec *codec = &g_codec;
|
|
|
|
flush_cache((unsigned long)srcBuf, cnt);
|
|
|
|
#if 1
|
|
codec_dbg("start dma: from 0x%p to 0x%p total 0x%x(%u)byte\n",
|
|
srcBuf, codec->addr_dbase + SUNXI_DAC_TXDATA, cnt, cnt);
|
|
#endif
|
|
/*ret = sunxi_dma_start(handle, (uint)srcBuf, codec->addr_dbase + SUNXI_DAC_TXDATA);*/
|
|
ret = sunxi_dma_start(handle, (uint)srcBuf,
|
|
(uint)(codec->addr_dbase + SUNXI_DAC_TXDATA), cnt);
|
|
|
|
return ret;
|
|
}
|