1825 lines
48 KiB
C
1825 lines
48 KiB
C
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*
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* This source code is subject to the terms and conditions defined in below
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* which is part of this source code package.
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*
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* Description:
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*/
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// Copyright (C) 2019 Amlogic, Inc. All rights reserved.
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//
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// All information contained herein is Amlogic confidential.
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//
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// This software is provided to you pursuant to Software License
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// Agreement (SLA) with Amlogic Inc ("Amlogic"). This software may be
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// used only in accordance with the terms of this agreement.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification is strictly prohibited without prior written permission
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// from Amlogic.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define LOG_TAG "vdi"
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#include <ctype.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <signal.h> /* SIGIO */
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#include <fcntl.h> /* fcntl */
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#include <pthread.h>
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#include <sys/mman.h> /* mmap */
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#include <sys/ioctl.h> /* fopen/fread */
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#include <sys/errno.h> /* fopen/fread */
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#include <sys/types.h>
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#include <sys/time.h>
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#include "vdi.h"
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#include "vdi_osal.h"
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#include "enc_regdefine.h"
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#include "vpuapi.h"
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#include "debug.h"
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#define VPU_DEVICE_NAME "/dev/amvenc_multi"
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typedef pthread_mutex_t MUTEX_HANDLE;
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#define VDI_SRAM_BASE_ADDR 0x00000000 // if we can know the sram address in SOC directly for vdi layer. it is possible to set in vdi layer without allocation from driver
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#define INIT_RETRY 100
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#define VDI_SYSTEM_ENDIAN VDI_LITTLE_ENDIAN
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#define VDI_128BIT_BUS_SYSTEM_ENDIAN VDI_128BIT_LITTLE_ENDIAN
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#define VPU_BIT_REG_SIZE (0x4000*MAX_NUM_VPU_CORE)
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#define VDI_VP521C_SRAM_SIZE 0x23000 /* 10bit profile : 8Kx8K -> 143360, 4Kx2K -> 71680
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* 8bit profile : 8Kx8K -> 114688, 4Kx2K -> 57344
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* NOTE: Decoder > Encoder
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*/
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#define VDI_NUM_LOCK_HANDLES 4
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#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
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#define VPU_CORE_BASE_OFFSET 0x4000
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#endif
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enum
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{
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INIT_VDI_STAT_NULL = 0,
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INIT_VDI_STAT_INIT = 1,
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INIT_VDI_STAT_OPENING = 2,
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INIT_VDI_STAT_ALLOC = 3,
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INIT_VDI_STAT_DONE = 4,
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};
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typedef struct vpu_buffer_t vpudrv_buffer_t;
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typedef struct vpudrv_buffer_pool_t
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{
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vpudrv_buffer_t vdb;
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int inuse;
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} vpudrv_buffer_pool_t;
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typedef struct {
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unsigned long core_idx;
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unsigned int product_code;
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int vpu_fd;
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vpu_instance_pool_t *pvip;
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#ifdef AML_FIXED_FOR_GLIBC_2_33
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int shared_mutex_fd;
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void* shared_mutex_map;
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#endif
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int task_num;
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int clock_state;
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vpudrv_buffer_t vdb_register;
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vpu_buffer_t vpu_common_memory;
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vpudrv_buffer_pool_t vpu_buffer_pool[MAX_VPU_BUFFER_POOL];
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int vpu_buffer_pool_count;
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void* vpu_mutex;
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void* vpu_omx_mutex;
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void* vpu_disp_mutex;
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void* vmem_mutex;
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} vdi_info_t;
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static vdi_info_t s_vdi_info[MAX_NUM_VPU_CORE];
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static int vdi_init_flag[MAX_NUM_VPU_CORE] = {0};
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static pthread_mutex_t vid_mutex = PTHREAD_MUTEX_INITIALIZER;
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static int swap_endian(u32 core_idx, unsigned char *data, int len, int endian);
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static void restore_mutex_in_dead(MUTEX_HANDLE *mutex)
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{
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int mutex_value;
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if (!mutex)
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return;
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#if 0 // defined(ANDROID)
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mutex_value = mutex->value;
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#else
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memcpy(&mutex_value, mutex, sizeof(mutex_value));
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#endif
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if (mutex_value == (int)0xdead10cc) // destroy by device driver
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{
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pthread_mutexattr_t mutexattr;
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pthread_mutexattr_init(&mutexattr);
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pthread_mutexattr_setpshared(&mutexattr, PTHREAD_PROCESS_SHARED);
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pthread_mutex_init(mutex, &mutexattr);
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}
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}
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static void vmem_lock(vdi_info_t* vdi)
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{
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#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
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#else
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const int MUTEX_TIMEOUT = 0x7fffffff;
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#endif
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#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
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restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vmem_mutex);
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pthread_mutex_lock((MUTEX_HANDLE*)vdi->vmem_mutex);
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#else
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if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vmem_mutex) != 0) {
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VLOG(ERR, "%s:%d failed to pthread_mutex_locK\n", __FUNCTION__, __LINE__);
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}
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#endif
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return;
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}
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static void vmem_unlock(vdi_info_t* vdi)
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{
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pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vmem_mutex);
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}
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int vdi_probe(u32 core_idx)
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{
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int ret;
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ret = vdi_init(core_idx);
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vdi_release(core_idx);
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return ret;
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}
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int vdi_init(u32 core_idx)
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{
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vdi_info_t *vdi;
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int i, retry_cnt = 0;
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if (core_idx >= MAX_NUM_VPU_CORE)
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return 0;
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pthread_mutex_lock(&vid_mutex);
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if (vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL) {
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vdi_init_flag[core_idx] = INIT_VDI_STAT_INIT;
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memset(&s_vdi_info[core_idx], 0x00, sizeof(s_vdi_info));
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s_vdi_info[core_idx].vpu_fd = -1;
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}
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vdi = &s_vdi_info[core_idx];
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if (vdi->vpu_fd != -1 && vdi_init_flag[core_idx] == INIT_VDI_STAT_DONE)
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{
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VLOG(ERR, "[VDI] opend already.\n");
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vdi->task_num++;
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pthread_mutex_unlock(&vid_mutex);
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return 0;
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}
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vdi_init_flag[core_idx] = INIT_VDI_STAT_OPENING;
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retry:
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vdi->vpu_fd = open(VPU_DEVICE_NAME, O_RDWR);
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if (vdi->vpu_fd < 0) {
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if (retry_cnt >= INIT_RETRY) {
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VLOG(ERR, "[VDI] Can't open vpu driver. [error=%s]\n", strerror(errno));
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vdi_init_flag[core_idx] = INIT_VDI_STAT_DONE;
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pthread_mutex_unlock(&vid_mutex);
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return -1;
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} else {
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VLOG(ERR,"[VDI] Init open vpu driver fail retrying \n");
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retry_cnt ++;
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pthread_mutex_unlock(&vid_mutex);
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osal_msleep(100);
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pthread_mutex_lock(&vid_mutex);
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goto retry;
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}
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}
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memset(vdi->vpu_buffer_pool, 0x00, sizeof(vpudrv_buffer_pool_t)*MAX_VPU_BUFFER_POOL);
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vdi_init_flag[core_idx] = INIT_VDI_STAT_ALLOC;
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if (!vdi_get_instance_pool(core_idx))
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{
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VLOG(INFO, "[VDI] fail to create shared info for saving context \n");
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goto ERR_VDI_INIT;
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}
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if (vdi->pvip->instance_pool_inited == FALSE)
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{
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int* pCodecInst;
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pthread_mutexattr_t mutexattr;
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pthread_mutexattr_init(&mutexattr);
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pthread_mutexattr_setpshared(&mutexattr, PTHREAD_PROCESS_SHARED);
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#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
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#else
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/* If a process or a thread is terminated abnormally,
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* pthread_mutexattr_setrobust_np(attr, PTHREAD_MUTEX_ROBUST_NP) makes
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* next onwer call pthread_mutex_lock() without deadlock.
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*/
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pthread_mutexattr_setrobust_np(&mutexattr, PTHREAD_MUTEX_ROBUST_NP);
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#endif
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pthread_mutex_init((MUTEX_HANDLE *)vdi->vpu_mutex, &mutexattr);
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pthread_mutex_init((MUTEX_HANDLE *)vdi->vpu_disp_mutex, &mutexattr);
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pthread_mutex_init((MUTEX_HANDLE *)vdi->vmem_mutex, &mutexattr);
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for ( i = 0; i < MAX_NUM_INSTANCE; i++) {
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pCodecInst = (int *)vdi->pvip->codecInstPool[i];
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pCodecInst[1] = i; // indicate instIndex of CodecInst
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pCodecInst[0] = 0; // indicate inUse of CodecInst
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}
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vdi->pvip->instance_pool_inited = TRUE;
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}
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if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_REGISTER_INFO, &vdi->vdb_register) < 0)
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{
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VLOG(ERR, "[VDI] fail to get host interface register\n");
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goto ERR_VDI_INIT;
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}
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vdi->vdb_register.virt_addr = (unsigned long)mmap(NULL, vdi->vdb_register.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, vdi->vdb_register.phys_addr);
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if ((void *)vdi->vdb_register.virt_addr == MAP_FAILED)
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{
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VLOG(ERR, "[VDI] fail to map vpu registers \n");
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goto ERR_VDI_INIT;
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}
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VLOG(INFO, "[VDI] map vdb_register core_idx=%d, virtaddr=0x%lx, size=%d\n", core_idx, vdi->vdb_register.virt_addr, vdi->vdb_register.size);
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vdi_set_clock_gate(core_idx, 1);
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vdi->product_code = vdi_read_register(core_idx, VPU_PRODUCT_CODE_REGISTER);
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vdi_set_clock_gate(core_idx, 0);
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if (vdi_lock(core_idx) < 0)
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{
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VLOG(ERR, "[VDI] fail to handle lock function\n");
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goto ERR_VDI_INIT;
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}
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if (vdi_allocate_common_memory(core_idx) < 0)
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{
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VLOG(ERR, "[VDI] fail to get vpu common buffer from driver\n");
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goto ERR_VDI_INIT;
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}
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vdi->core_idx = core_idx;
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vdi->task_num++;
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vdi_unlock(core_idx);
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vdi_init_flag[core_idx] = INIT_VDI_STAT_DONE;
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pthread_mutex_unlock(&vid_mutex);
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VLOG(INFO, "[VDI] success to init driver \n");
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return 0;
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ERR_VDI_INIT:
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vdi_unlock(core_idx);
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vdi_init_flag[core_idx] = INIT_VDI_STAT_DONE;
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pthread_mutex_unlock(&vid_mutex);
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vdi_release(core_idx);
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return -1;
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}
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int vdi_set_bit_firmware_to_pm(u32 core_idx, const u16 *code)
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{
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int i;
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vpu_bit_firmware_info_t bit_firmware_info;
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vdi_info_t *vdi;
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if (core_idx >= MAX_NUM_VPU_CORE)
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return 0;
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vdi = &s_vdi_info[core_idx];
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if (!vdi || vdi->vpu_fd == -1 ||
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vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
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return 0;
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bit_firmware_info.size = sizeof(vpu_bit_firmware_info_t);
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bit_firmware_info.core_idx = core_idx;
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#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
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bit_firmware_info.reg_base_offset = (core_idx*VPU_CORE_BASE_OFFSET);
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#else
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bit_firmware_info.reg_base_offset = 0;
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#endif
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for (i=0; i<512; i++)
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bit_firmware_info.bit_code[i] = code[i];
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if (write(vdi->vpu_fd, &bit_firmware_info, bit_firmware_info.size) < 0)
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{
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VLOG(ERR, "[VDI] fail to vdi_set_bit_firmware core=%d\n", bit_firmware_info.core_idx);
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return -1;
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}
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return 0;
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}
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#if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
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int vdi_get_task_num(unsigned long core_idx)
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{
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vdi_info_t *vdi;
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vdi = &s_vdi_info[core_idx];
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if (!vdi || vdi->vpu_fd == -1 ||
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vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
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return -1;
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return vdi->task_num;
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}
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#endif
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int vdi_release(u32 core_idx)
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{
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int i;
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vpudrv_buffer_t vdb;
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vdi_info_t *vdi;
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if (core_idx >= MAX_NUM_VPU_CORE)
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return 0;
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pthread_mutex_lock(&vid_mutex);
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vdi = &s_vdi_info[core_idx];
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if (!vdi || vdi->vpu_fd == -1 ||
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vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL) {
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pthread_mutex_unlock(&vid_mutex);
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return 0;
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}
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if (vdi_lock(core_idx) < 0)
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{
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VLOG(ERR, "[VDI] fail to handle lock function\n");
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pthread_mutex_unlock(&vid_mutex);
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return -1;
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}
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if (vdi->task_num > 1) // means that the opened instance remains
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{
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vdi->task_num--;
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vdi_unlock(core_idx);
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pthread_mutex_unlock(&vid_mutex);
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return 0;
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}
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if (vdi->vdb_register.virt_addr)
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munmap((void *)vdi->vdb_register.virt_addr, vdi->vdb_register.size);
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osal_memset(&vdi->vdb_register, 0x00, sizeof(vpudrv_buffer_t));
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vdb.size = 0;
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// get common memory information to free virtual address
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for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
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{
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if (vdi->vpu_common_memory.phys_addr >= vdi->vpu_buffer_pool[i].vdb.phys_addr &&
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vdi->vpu_common_memory.phys_addr < (vdi->vpu_buffer_pool[i].vdb.phys_addr + vdi->vpu_buffer_pool[i].vdb.size))
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{
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vdi->vpu_buffer_pool[i].inuse = 0;
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vdi->vpu_buffer_pool_count--;
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vdb = vdi->vpu_buffer_pool[i].vdb;
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break;
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}
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}
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vdi_unlock(core_idx);
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//pthread_mutex_lock(&vid_mutex);
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if (vdb.size > 0)
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{
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munmap((void *)vdb.virt_addr, vdb.size);
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memset(&vdi->vpu_common_memory, 0x00, sizeof(vpu_buffer_t));
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}
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vdi->task_num--;
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if (vdi->pvip)
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munmap(vdi->pvip, (sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE) * VDI_NUM_LOCK_HANDLES));
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#ifdef AML_FIXED_FOR_GLIBC_2_33
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if (vdi->shared_mutex_map)
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munmap(vdi->shared_mutex_map, sizeof(MUTEX_HANDLE) * VDI_NUM_LOCK_HANDLES);
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if (vdi->shared_mutex_fd) {
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close(vdi->shared_mutex_fd);
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vdi->shared_mutex_fd = -1;
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}
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#endif
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if (vdi->vpu_fd != -1 && vdi_init_flag[core_idx] != INIT_VDI_STAT_NULL)
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{
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close(vdi->vpu_fd);
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vdi->vpu_fd = -1;
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}
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vdi_init_flag[core_idx] = INIT_VDI_STAT_NULL;
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memset(vdi, 0x00, sizeof(vdi_info_t));
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pthread_mutex_unlock(&vid_mutex);
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return 0;
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}
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int vdi_get_common_memory(u32 core_idx, vpu_buffer_t *vb)
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{
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vdi_info_t *vdi;
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if (core_idx >= MAX_NUM_VPU_CORE)
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return -1;
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vdi = &s_vdi_info[core_idx];
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if (!vdi || vdi->vpu_fd == -1 ||
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vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
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return -1;
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osal_memcpy(vb, &vdi->vpu_common_memory, sizeof(vpu_buffer_t));
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return 0;
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}
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int vdi_allocate_common_memory(u32 core_idx)
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{
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vdi_info_t *vdi = &s_vdi_info[core_idx];
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vpudrv_buffer_t vdb;
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int i;
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if (core_idx >= MAX_NUM_VPU_CORE)
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return -1;
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if (!vdi || vdi->vpu_fd == -1 ||
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vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
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return -1;
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|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
vdb.size = SIZE_COMMON*MAX_NUM_VPU_CORE;
|
|
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_COMMON_MEMORY, &vdb) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to vdi_allocate_dma_memory size=%d\n", vdb.size);
|
|
return -1;
|
|
}
|
|
|
|
vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, vdb.phys_addr);
|
|
if ((void *)vdb.virt_addr == MAP_FAILED)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to map common memory phyaddr=0x%lx, size = %d\n", (ulong)vdb.phys_addr, (int)vdb.size);
|
|
return -1;
|
|
}
|
|
|
|
VLOG(INFO, "[VDI] vdi_allocate_common_memory, physaddr=0x%lx, virtaddr=0x%lx\n", (ulong)vdb.phys_addr, (ulong)vdb.virt_addr);
|
|
|
|
// convert os driver buffer type to vpu buffer type
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
vdi->pvip->vpu_common_buffer.size = SIZE_COMMON;
|
|
vdi->pvip->vpu_common_buffer.phys_addr = (ulong)(vdb.phys_addr + (core_idx*SIZE_COMMON));
|
|
vdi->pvip->vpu_common_buffer.base = (ulong)(vdb.base + (core_idx*SIZE_COMMON));
|
|
vdi->pvip->vpu_common_buffer.virt_addr = (ulong)(vdb.virt_addr + (core_idx*SIZE_COMMON));
|
|
#else
|
|
vdi->pvip->vpu_common_buffer.size = SIZE_COMMON;
|
|
vdi->pvip->vpu_common_buffer.phys_addr = (ulong)(vdb.phys_addr);
|
|
vdi->pvip->vpu_common_buffer.base = (ulong)(vdb.base);
|
|
vdi->pvip->vpu_common_buffer.virt_addr = (ulong)(vdb.virt_addr);
|
|
#endif
|
|
osal_memcpy(&vdi->vpu_common_memory, &vdi->pvip->vpu_common_buffer, sizeof(vpudrv_buffer_t));
|
|
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 0)
|
|
{
|
|
vdi->vpu_buffer_pool[i].vdb = vdb;
|
|
vdi->vpu_buffer_pool_count++;
|
|
vdi->vpu_buffer_pool[i].inuse = 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
VLOG(INFO, "[VDI] vdi_get_common_memory physaddr=0x%lx, size=%d, virtaddr=0x%lx\n", (ulong)vdi->vpu_common_memory.phys_addr, (int)vdi->vpu_common_memory.size, (ulong)vdi->vpu_common_memory.virt_addr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
vpu_instance_pool_t *vdi_get_instance_pool(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_buffer_t vdb;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return NULL;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return NULL;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
if (!vdi->pvip)
|
|
{
|
|
vdb.size = sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE)*VDI_NUM_LOCK_HANDLES;
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
vdb.size *= MAX_NUM_VPU_CORE;
|
|
#endif
|
|
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_INSTANCE_POOL, &vdb) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to allocate get instance pool physical space=%d\n", (int)vdb.size);
|
|
return NULL;
|
|
}
|
|
|
|
vdb.virt_addr = (ulong)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, 0);
|
|
|
|
if (vdb.virt_addr == (ulong)MAP_FAILED)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to map instance pool phyaddr=0x%x, size = %d\n", (int)vdb.phys_addr, (int)vdb.size);
|
|
return NULL;
|
|
}
|
|
#ifdef AML_FIXED_FOR_GLIBC_2_33
|
|
int shared_mutex_fd = open(VPU_SHARED_FILE_NAME, O_CREAT|O_RDWR, 00777);
|
|
if (shared_mutex_fd < 0) {
|
|
VLOG(ERR,
|
|
"[VDI] Can't open %s. [error=%s]\n"
|
|
"Maybe this file has been created by others\n",
|
|
VPU_SHARED_FILE_NAME, strerror(errno));
|
|
munmap((void *)vdb.virt_addr, vdb.size);
|
|
return NULL;
|
|
}
|
|
|
|
if (ftruncate(shared_mutex_fd, VPU_SHARED_FILE_SIZE) != 0) {
|
|
VLOG(ERR, "[VDI] Can't truncate %s. [error=%s]\n",
|
|
VPU_SHARED_FILE_NAME, strerror(errno));
|
|
close(shared_mutex_fd);
|
|
shared_mutex_fd = -1;
|
|
munmap((void *)vdb.virt_addr, vdb.size);
|
|
return NULL;
|
|
}
|
|
|
|
void *shared_mutex_map = mmap(NULL, VPU_SHARED_FILE_SIZE,
|
|
PROT_READ | PROT_WRITE,
|
|
MAP_SHARED, shared_mutex_fd, 0);
|
|
if (shared_mutex_map == MAP_FAILED) {
|
|
VLOG(ERR, "[VDI] fail to map vpu shared file=0x%lx, size = %d\n",
|
|
(unsigned long)shared_mutex_map, VPU_SHARED_FILE_SIZE);
|
|
close(shared_mutex_fd);
|
|
shared_mutex_fd = -1;
|
|
munmap((void *)vdb.virt_addr, vdb.size);
|
|
return NULL;
|
|
}
|
|
|
|
vdi->shared_mutex_fd = shared_mutex_fd;
|
|
vdi->shared_mutex_map = shared_mutex_map;
|
|
#endif
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
vdi->pvip = (vpu_instance_pool_t *)(vdb.virt_addr + (core_idx*(sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE)*VDI_NUM_LOCK_HANDLES)));
|
|
#else
|
|
vdi->pvip = (vpu_instance_pool_t *)(vdb.virt_addr);
|
|
#endif
|
|
#ifdef AML_FIXED_FOR_GLIBC_2_33
|
|
vdi->vpu_mutex = vdi->shared_mutex_map;
|
|
// Unused Mutex
|
|
vdi->vpu_disp_mutex =
|
|
(void*)((unsigned long)vdi->shared_mutex_map + sizeof(MUTEX_HANDLE));
|
|
vdi->vmem_mutex =
|
|
(void*)((unsigned long)vdi->shared_mutex_map + 2 * sizeof(MUTEX_HANDLE));
|
|
#else
|
|
vdi->vpu_mutex = (void *)((ulong)vdi->pvip + sizeof(vpu_instance_pool_t)); //change the pointer of vpu_mutex to at end pointer of vpu_instance_pool_t to assign at allocated position.
|
|
vdi->vpu_disp_mutex = (void *)((ulong)vdi->pvip + sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE));
|
|
vdi->vmem_mutex = (void *)((unsigned long)vdi->pvip + sizeof(vpu_instance_pool_t) + 2*sizeof(MUTEX_HANDLE));
|
|
#endif
|
|
|
|
VLOG(INFO, "[VDI] instance pool physaddr=0x%x, virtaddr=0x%x, base=0x%x, size=%d\n", (int)vdb.phys_addr, (int)vdb.virt_addr, (int)vdb.base, (int)vdb.size);
|
|
}
|
|
|
|
return (vpu_instance_pool_t *)vdi->pvip;
|
|
}
|
|
|
|
int vdi_open_instance(u32 core_idx, u32 inst_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_inst_info_t inst_info;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
inst_info.core_idx = core_idx;
|
|
inst_info.inst_idx = inst_idx;
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_OPEN_INSTANCE, &inst_info) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to deliver open instance num inst_idx=%d\n", (int)inst_idx);
|
|
return -1;
|
|
}
|
|
vdi->pvip->vpu_instance_num = inst_info.inst_open_count;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int vdi_close_instance(u32 core_idx, u32 inst_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_inst_info_t inst_info = {0, };
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
inst_info.core_idx = core_idx;
|
|
inst_info.inst_idx = inst_idx;
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_CLOSE_INSTANCE, &inst_info) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to deliver open instance num inst_idx=%d\n", (int)inst_idx);
|
|
return -1;
|
|
}
|
|
vdi->pvip->vpu_instance_num = inst_info.inst_open_count;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int vdi_sys_sync_inst_param(struct vpudrv_inst_param_t *pvip)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (pvip->core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[pvip->core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[pvip->core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_SYNC_INSTANCE_PARAM, pvip) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to deliver sync instance param inst_idx=%d\n", (int)pvip->inst_idx);
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
u32 vdi_get_instance_num(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
return vdi->pvip->vpu_instance_num;
|
|
}
|
|
|
|
int vdi_hw_reset(u32 core_idx) // DEVICE_ADDR_SW_RESET
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
return ioctl(vdi->vpu_fd, VDI_IOCTL_RESET, 0);
|
|
|
|
}
|
|
|
|
int vdi_lock(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
|
|
#else
|
|
const int MUTEX_TIMEOUT = 0x7fffffff;
|
|
#endif
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
|
|
restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vpu_mutex);
|
|
pthread_mutex_lock((MUTEX_HANDLE*)vdi->vpu_mutex);
|
|
#else
|
|
if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vpu_mutex) != 0) {
|
|
VLOG(ERR, "%s:%d failed to pthread_mutex_locK\n", __FUNCTION__, __LINE__);
|
|
return -1;
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
void vdi_unlock(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return;
|
|
|
|
pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vpu_mutex);//lint !e455
|
|
}
|
|
|
|
int vdi_disp_lock(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
|
|
#else
|
|
const int MUTEX_TIMEOUT = 5000; // ms
|
|
#endif
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
#if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
|
|
restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vpu_disp_mutex);
|
|
pthread_mutex_lock((MUTEX_HANDLE*)vdi->vpu_disp_mutex);
|
|
#else
|
|
if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vpu_disp_mutex) != 0)
|
|
VLOG(ERR, "%s:%d failed to pthread_mutex_lock\n", __FUNCTION__, __LINE__);
|
|
return -1;
|
|
}
|
|
|
|
#endif /* ANDROID */
|
|
|
|
return 0;//lint !e454
|
|
}
|
|
|
|
void vdi_disp_unlock(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return;
|
|
|
|
pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vpu_disp_mutex);//lint !e455
|
|
}
|
|
|
|
void vdi_write_register(u32 core_idx, unsigned int addr, unsigned int data)
|
|
{
|
|
vdi_info_t *vdi;
|
|
unsigned long *reg_addr;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return;
|
|
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr + (core_idx*VPU_CORE_BASE_OFFSET));
|
|
#else
|
|
reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr);
|
|
#endif
|
|
*(volatile unsigned int *)reg_addr = data;
|
|
}
|
|
|
|
unsigned int vdi_read_register(u32 core_idx, unsigned int addr)
|
|
{
|
|
vdi_info_t *vdi;
|
|
unsigned long *reg_addr;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return (unsigned int)-1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return (unsigned int)-1;
|
|
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr + (core_idx*VPU_CORE_BASE_OFFSET));
|
|
#else
|
|
reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr);
|
|
#endif
|
|
return *(volatile unsigned int *)reg_addr;
|
|
}
|
|
|
|
#define FIO_TIMEOUT 100
|
|
|
|
unsigned int vdi_fio_read_register(u32 core_idx, unsigned int addr)
|
|
{
|
|
unsigned int ctrl;
|
|
unsigned int count = 0;
|
|
unsigned int data = 0xffffffff;
|
|
|
|
ctrl = (addr&0xffff);
|
|
ctrl |= (0<<16); /* read operation */
|
|
vdi_write_register(core_idx, VP5_VPU_FIO_CTRL_ADDR, ctrl);
|
|
count = FIO_TIMEOUT;
|
|
while (count--) {
|
|
ctrl = vdi_read_register(core_idx, VP5_VPU_FIO_CTRL_ADDR);
|
|
if (ctrl & 0x80000000) {
|
|
data = vdi_read_register(core_idx, VP5_VPU_FIO_DATA);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return data;
|
|
}
|
|
|
|
void vdi_fio_write_register(u32 core_idx, unsigned int addr, unsigned int data)
|
|
{
|
|
unsigned int ctrl;
|
|
unsigned int count = 0;
|
|
|
|
vdi_write_register(core_idx, VP5_VPU_FIO_DATA, data);
|
|
ctrl = (addr&0xffff);
|
|
ctrl |= (1<<16); /* write operation */
|
|
vdi_write_register(core_idx, VP5_VPU_FIO_CTRL_ADDR, ctrl);
|
|
|
|
count = FIO_TIMEOUT;
|
|
while (count--) {
|
|
ctrl = vdi_read_register(core_idx, VP5_VPU_FIO_CTRL_ADDR);
|
|
if (ctrl & 0x80000000) {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
int vdi_clear_memory(u32 core_idx, PhysicalAddress addr, int len, int endian)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_buffer_t vdb;
|
|
unsigned long offset;
|
|
|
|
int i;
|
|
Uint8* zero;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
if(endian > VDI_ENDIAN_MAX) return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 1)
|
|
{
|
|
vdb = vdi->vpu_buffer_pool[i].vdb;
|
|
if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size))
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!vdb.size) {
|
|
VLOG(ERR, "address 0x%08x is not mapped address!!!\n", (int)addr);
|
|
return -1;
|
|
}
|
|
|
|
zero = (Uint8*)osal_malloc(len);
|
|
osal_memset((void*)zero, 0x00, len);
|
|
|
|
offset = addr - (unsigned long)vdb.phys_addr;
|
|
osal_memcpy((void *)((unsigned long)vdb.virt_addr+offset), zero, len);
|
|
|
|
osal_free(zero);
|
|
vdb.phys_addr = addr;
|
|
vdb.size = len;
|
|
vdi_flush_memory(core_idx, &vdb);
|
|
return len;
|
|
}
|
|
|
|
int vdi_set_memory(u32 core_idx, PhysicalAddress addr, int len, int endian, Uint32 data)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_buffer_t vdb;
|
|
unsigned long offset;
|
|
|
|
int i;
|
|
Uint8* zero;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
if (endian > VDI_ENDIAN_MAX) return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 1)
|
|
{
|
|
vdb = vdi->vpu_buffer_pool[i].vdb;
|
|
if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size))
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!vdb.size) {
|
|
VLOG(ERR, "address 0x%08x is not mapped address!!!\n", (int)addr);
|
|
return -1;
|
|
}
|
|
|
|
zero = (Uint8*)osal_malloc(len);
|
|
osal_memset((void*)zero, data, len);
|
|
|
|
offset = addr - (unsigned long)vdb.phys_addr;
|
|
osal_memcpy((void *)((unsigned long)vdb.virt_addr+offset), zero, len);
|
|
|
|
osal_free(zero);
|
|
|
|
vdb.phys_addr = addr;
|
|
vdb.size = len;
|
|
vdi_flush_memory(core_idx, &vdb);
|
|
|
|
return len;
|
|
}
|
|
|
|
int vdi_write_memory(u32 core_idx, PhysicalAddress addr, unsigned char *data, int len, int endian)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_buffer_t vdb;
|
|
unsigned long offset;
|
|
int i;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
if (!data)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 1)
|
|
{
|
|
vdb = vdi->vpu_buffer_pool[i].vdb;
|
|
if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size)) {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (!vdb.size) {
|
|
VLOG(ERR, "address 0x%08x is not mapped address!!!\n", (int)addr);
|
|
return -1;
|
|
}
|
|
|
|
|
|
offset = addr - (unsigned long)vdb.phys_addr;
|
|
swap_endian(core_idx, data, len, endian);
|
|
osal_memcpy((void *)((unsigned long)vdb.virt_addr+offset), data, len);
|
|
vdb.phys_addr = addr;
|
|
vdb.size = len;
|
|
vdi_flush_memory(core_idx, &vdb);
|
|
return len;
|
|
}
|
|
|
|
int vdi_read_memory(u32 core_idx, PhysicalAddress addr, unsigned char *data, int len, int endian)
|
|
{
|
|
vdi_info_t *vdi;
|
|
vpudrv_buffer_t vdb;
|
|
ulong offset;
|
|
int i;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 1)
|
|
{
|
|
vdb = vdi->vpu_buffer_pool[i].vdb;
|
|
if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size))
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!vdb.size)
|
|
return -1;
|
|
|
|
offset = addr - (ulong)vdb.phys_addr;
|
|
vdb.phys_addr = addr;
|
|
vdb.size = len;
|
|
vdi_invalidate_memory(core_idx, &vdb);
|
|
osal_memcpy(data, (const void *)((ulong)vdb.virt_addr+offset), len);
|
|
swap_endian(core_idx, data, len, endian);
|
|
|
|
return len;
|
|
}
|
|
|
|
int vdi_allocate_dma_memory(u32 core_idx, vpu_buffer_t *vb, int memTypes, int instIndex)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int i;
|
|
vpudrv_buffer_t vdb;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
vdb.size = vb->size;
|
|
vdb.cached = 1;
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_ALLOCATE_PHYSICAL_MEMORY, &vdb) < 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to vdi_allocate_dma_memory size=%d\n", vb->size);
|
|
return -1;
|
|
}
|
|
vb->phys_addr = (ulong)vdb.phys_addr;
|
|
vb->base = (ulong)vdb.base;
|
|
|
|
//map to virtual address
|
|
vdb.virt_addr = (ulong)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE,
|
|
MAP_SHARED, vdi->vpu_fd, vdb.phys_addr);
|
|
if ((void *)vdb.virt_addr == MAP_FAILED)
|
|
{
|
|
memset(vb, 0x00, sizeof(vpu_buffer_t));
|
|
return -1;
|
|
}
|
|
vb->virt_addr = vdb.virt_addr;
|
|
|
|
vmem_lock(vdi);
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 0)
|
|
{
|
|
vdi->vpu_buffer_pool[i].vdb = vdb;
|
|
vdi->vpu_buffer_pool_count++;
|
|
vdi->vpu_buffer_pool[i].inuse = 1;
|
|
break;
|
|
}
|
|
}
|
|
vmem_unlock(vdi);
|
|
VLOG(INFO, "[VDI] vdi_allocate_dma_memory, physaddr=%lx, virtaddr=%p~%p, size=%d, memType=%d\n",
|
|
(ulong)vb->phys_addr, (void *)vb->virt_addr, (void *)(vb->virt_addr + vb->size), vb->size, memTypes);
|
|
return 0;
|
|
}
|
|
|
|
unsigned long vdi_get_dma_memory_free_size(u32 coreIdx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int size;
|
|
|
|
vdi = &s_vdi_info[coreIdx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[coreIdx] == INIT_VDI_STAT_NULL)
|
|
return (unsigned long)-1;
|
|
if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_FREE_MEM_SIZE, &size) < 0) {
|
|
VLOG(ERR, "[VDI] fail VDI_IOCTL_GET_FREE_MEM_SIZE size=%d\n", size);
|
|
return 0;
|
|
}
|
|
return size;
|
|
}
|
|
|
|
int vdi_attach_dma_memory(u32 core_idx, vpu_buffer_t *vb)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int i;
|
|
vpudrv_buffer_t vdb;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
vdb.size = vb->size;
|
|
vdb.phys_addr = vb->phys_addr;
|
|
vdb.base = vb->base;
|
|
|
|
vdb.virt_addr = vb->virt_addr;
|
|
|
|
vmem_lock(vdi);
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
|
|
{
|
|
vdi->vpu_buffer_pool[i].vdb = vdb;
|
|
vdi->vpu_buffer_pool[i].inuse = 1;
|
|
break;
|
|
}
|
|
else
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].inuse == 0)
|
|
{
|
|
vdi->vpu_buffer_pool[i].vdb = vdb;
|
|
vdi->vpu_buffer_pool_count++;
|
|
vdi->vpu_buffer_pool[i].inuse = 1;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
vmem_unlock(vdi);
|
|
|
|
//VLOG(INFO, "[VDI] vdi_attach_dma_memory, physaddr=0x%lx, virtaddr=0x%lx, size=%d, index=%d\n", vb->phys_addr, vb->virt_addr, vb->size, i);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int vdi_dettach_dma_memory(u32 core_idx, vpu_buffer_t *vb)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int i;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
#endif
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vb || !vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
if (vb->size == 0)
|
|
return -1;
|
|
|
|
vmem_lock(vdi);
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
|
|
{
|
|
vdi->vpu_buffer_pool[i].inuse = 0;
|
|
vdi->vpu_buffer_pool_count--;
|
|
break;
|
|
}
|
|
}
|
|
vmem_unlock(vdi);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void vdi_free_dma_memory(u32 core_idx, vpu_buffer_t *vb, int memTypes, int instIndex)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int i;
|
|
vpudrv_buffer_t vdb;
|
|
|
|
#ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
|
|
core_idx = 0;
|
|
#else
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return;
|
|
#endif
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vb || !vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return;
|
|
|
|
if (vb->size == 0)
|
|
return ;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
vmem_lock(vdi);
|
|
for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
|
|
{
|
|
if (vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
|
|
{
|
|
vdi->vpu_buffer_pool[i].inuse = 0;
|
|
vdi->vpu_buffer_pool_count--;
|
|
vdb = vdi->vpu_buffer_pool[i].vdb;
|
|
break;
|
|
}
|
|
}
|
|
vmem_unlock(vdi);
|
|
|
|
if (!vdb.size)
|
|
{
|
|
VLOG(ERR, "[VDI] invalid buffer to free address = 0x%lx vb address 0x%lx size %d\n",
|
|
(ulong)vdb.virt_addr, (ulong)vb->phys_addr, vb->size);
|
|
return ;
|
|
}
|
|
ioctl(vdi->vpu_fd, VDI_IOCTL_FREE_PHYSICALMEMORY, &vdb);
|
|
|
|
if (munmap((void *)vdb.virt_addr, vdb.size) != 0)
|
|
{
|
|
VLOG(ERR, "[VDI] fail to vdi_free_dma_memory virtial address = 0x%lx\n", (ulong)vdb.virt_addr);
|
|
}
|
|
osal_memset(vb, 0, sizeof(vpu_buffer_t));
|
|
}
|
|
|
|
int vdi_get_sram_memory(u32 core_idx, vpu_buffer_t *vb)
|
|
{
|
|
vdi_info_t *vdi = NULL;
|
|
vpudrv_buffer_t vdb;
|
|
unsigned int sram_size = 0;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vb || !vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
|
|
|
|
switch (vdi->product_code) {
|
|
case VP521C_CODE:
|
|
sram_size = VDI_VP521C_SRAM_SIZE; break;
|
|
default:
|
|
VLOG(ERR, "[VDI] check product_code(%x)\n", vdi->product_code);
|
|
break;
|
|
}
|
|
|
|
if (sram_size > 0) // if we can know the sram address directly in vdi layer, we use it first for sdram address
|
|
{
|
|
vb->phys_addr = VDI_SRAM_BASE_ADDR+(core_idx*sram_size); // HOST can set DRAM base addr to VDI_SRAM_BASE_ADDR.
|
|
vb->size = sram_size;
|
|
|
|
return 0;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int vdi_flush_memory(u32 core_idx, vpu_buffer_t* vb)
|
|
{
|
|
vdi_info_t* vdi;
|
|
int i, ret = -1;
|
|
vpu_buffer_t vdb;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vb || !vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
memset(&vdb, 0x00, sizeof(vpu_buffer_t));
|
|
|
|
for (i = 0; i < MAX_VPU_BUFFER_POOL; i++) {
|
|
if ((vdi->vpu_buffer_pool[i].vdb.phys_addr <= vb->phys_addr) &&
|
|
(vdi->vpu_buffer_pool[i].vdb.phys_addr + vdi->vpu_buffer_pool[i].vdb.size) >= (vb->phys_addr + vb->size))
|
|
{ //validate buffer
|
|
vdb = *vb;
|
|
break;
|
|
}
|
|
}
|
|
if (vdb.size > 0)
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_FLUSH_BUFFER, (void*)&vdb);
|
|
return ret;
|
|
}
|
|
|
|
int vdi_invalidate_memory(u32 core_idx, vpu_buffer_t *vb)
|
|
{
|
|
vdi_info_t* vdi;
|
|
int i, ret = -1;
|
|
vpu_buffer_t vdb;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vb || !vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
memset(&vdb, 0x00, sizeof(vpu_buffer_t));
|
|
|
|
for (i = 0; i < MAX_VPU_BUFFER_POOL; i++) {
|
|
if (vdi->vpu_buffer_pool[i].vdb.phys_addr <= vb->phys_addr &&
|
|
(vdi->vpu_buffer_pool[i].vdb.phys_addr + vdi->vpu_buffer_pool[i].vdb.size) >= (vb->phys_addr + vb->size))
|
|
{ //validate buffer
|
|
vdb = *vb;
|
|
break;
|
|
}
|
|
}
|
|
if (vdb.size > 0)
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_CACHE_INV_BUFFER, (void*)&vdb);
|
|
return ret;
|
|
}
|
|
|
|
int vdi_config_dma(u32 core_idx, vpu_dma_buf_info_t *info)
|
|
{
|
|
int ret;
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
VLOG(INFO, "[VDI] CONFIG_DMA plane %d fd(%d, %d, %d)\n",
|
|
info->num_planes, info->fd[0], info->fd[1], info->fd[2]);
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_CONFIG_DMA, (void*)info);
|
|
VLOG(INFO, "[VDI] DMA physic %d phy(%lx, %lx, %lx)\n",
|
|
info->num_planes, info->phys_addr[0], info->phys_addr[1], info->phys_addr[2]);
|
|
return ret;
|
|
}
|
|
|
|
//hoan add for canvas
|
|
|
|
int vdi_config_dma_canvas(u32 core_idx, vpu_dma_buf_canvas_info_t *info)
|
|
{
|
|
int ret;
|
|
vdi_info_t *vdi;
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_READ_CANVAS, (void*)info);
|
|
|
|
VLOG(NONE, "[canvas_u] >> vdi_config_dma_canvas DMA physic %d phy(%lx, %lx, %lx)\n",
|
|
info->num_planes, info->phys_addr[0], info->phys_addr[1], info->phys_addr[2]);
|
|
return ret;
|
|
}
|
|
|
|
//end
|
|
int vdi_unmap_dma(u32 core_idx, vpu_dma_buf_info_t *info)
|
|
{
|
|
int ret;
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_UNMAP_DMA, (void*)info);
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
int vdi_set_clock_gate(u32 core_idx, int enable)
|
|
{
|
|
vdi_info_t *vdi = NULL;
|
|
int ret;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
vdi = &s_vdi_info[core_idx];
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
vdi->clock_state = enable;
|
|
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_SET_CLOCK_GATE, &enable);
|
|
|
|
VLOG(INFO, "[VDI] clock enable %d\n", enable);
|
|
return ret;
|
|
}
|
|
|
|
int vdi_get_clock_gate(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int ret;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
ret = vdi->clock_state;
|
|
return ret;
|
|
}
|
|
|
|
static int get_pc_addr(Uint32 product_code)
|
|
{
|
|
if (PRODUCT_CODE_VP_SERIES(product_code)) {
|
|
return VP5_VCPU_CUR_PC;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", product_code);
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
int vdi_wait_bus_busy(u32 core_idx, int timeout, unsigned int gdi_busy_flag)
|
|
{
|
|
Uint64 elapse, cur;
|
|
Uint32 pc;
|
|
vdi_info_t *vdi;
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
elapse = osal_gettime();
|
|
pc = get_pc_addr(vdi->product_code);
|
|
while(1)
|
|
{
|
|
if (vdi->product_code == VP521C_CODE) {
|
|
if (vdi_fio_read_register(core_idx, gdi_busy_flag) == 0x3f) break;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
|
|
if (timeout > 0) {
|
|
cur = osal_gettime();
|
|
|
|
if ((int)(cur - elapse) > timeout) {
|
|
print_busy_timeout_status(core_idx, vdi->product_code, pc);
|
|
return -1;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
|
|
int vdi_wait_vpu_busy(u32 core_idx, int timeout, unsigned int addr_bit_busy_flag)
|
|
{
|
|
Uint64 elapse, cur;
|
|
Uint32 pc;
|
|
Uint32 normalReg = TRUE;
|
|
vdi_info_t *vdi;
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
elapse = osal_gettime();
|
|
pc = get_pc_addr(vdi->product_code);
|
|
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
if (addr_bit_busy_flag&0x8000) normalReg = FALSE;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
|
|
while(1)
|
|
{
|
|
if (normalReg == TRUE) {
|
|
if (vdi_read_register(core_idx, addr_bit_busy_flag) == 0) break;
|
|
}
|
|
else {
|
|
if (vdi_fio_read_register(core_idx, addr_bit_busy_flag) == 0) break;
|
|
}
|
|
|
|
if (timeout > 0) {
|
|
cur = osal_gettime();
|
|
|
|
if ((int)(cur - elapse) > timeout) {
|
|
print_busy_timeout_status(core_idx, vdi->product_code, pc);
|
|
return -1;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
|
|
int vdi_wait_vcpu_bus_busy(u32 core_idx, int timeout, unsigned int addr_bit_busy_flag)
|
|
{
|
|
Uint64 elapse, cur;
|
|
Uint32 pc;
|
|
Uint32 normalReg = TRUE;
|
|
vdi_info_t *vdi;
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
elapse = osal_gettime();
|
|
|
|
pc = get_pc_addr(vdi->product_code);
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
if (addr_bit_busy_flag&0x8000) normalReg = FALSE;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
while(1)
|
|
{
|
|
if (normalReg == TRUE) {
|
|
if (vdi_read_register(core_idx, addr_bit_busy_flag) == 0x40) break;
|
|
}
|
|
else {
|
|
if (vdi_fio_read_register(core_idx, addr_bit_busy_flag) == 0x40) break;
|
|
}
|
|
|
|
if (timeout > 0) {
|
|
cur = osal_gettime();
|
|
|
|
if ((int)(cur - elapse) > timeout) {
|
|
print_busy_timeout_status(core_idx, vdi->product_code, pc);
|
|
return -1;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int vdi_wait_interrupt(u32 coreIdx, unsigned int instIdx, int timeout)
|
|
{
|
|
int intr_reason = 0;
|
|
int ret;
|
|
vdi_info_t *vdi;
|
|
vpudrv_intr_info_t intr_info;
|
|
|
|
if (coreIdx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[coreIdx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[coreIdx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
intr_info.timeout = timeout;
|
|
intr_info.intr_reason = 0;
|
|
intr_info.intr_inst_index = instIdx;
|
|
ret = ioctl(vdi->vpu_fd, VDI_IOCTL_WAIT_INTERRUPT, (void*)&intr_info);
|
|
if (ret != 0)
|
|
return -1;
|
|
intr_reason = intr_info.intr_reason;
|
|
|
|
return intr_reason;
|
|
}
|
|
|
|
//------------------------------------------------------------------------------
|
|
// LOG & ENDIAN functions
|
|
//------------------------------------------------------------------------------
|
|
|
|
int vdi_get_system_endian(u32 core_idx)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
return VDI_128BIT_BUS_SYSTEM_ENDIAN;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
int vdi_convert_endian(u32 core_idx, unsigned int endian)
|
|
{
|
|
vdi_info_t *vdi;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
switch (endian) {
|
|
case VDI_LITTLE_ENDIAN: endian = 0x00; break;
|
|
case VDI_BIG_ENDIAN: endian = 0x0f; break;
|
|
case VDI_32BIT_LITTLE_ENDIAN: endian = 0x04; break;
|
|
case VDI_32BIT_BIG_ENDIAN: endian = 0x03; break;
|
|
}
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
|
|
return (endian&0x0f);
|
|
}
|
|
|
|
void byte_swap(unsigned char* data, int len)
|
|
{
|
|
Uint8 temp;
|
|
Int32 i;
|
|
if(len & 0x1) len++;
|
|
for (i=0; i<len; i+=2) {
|
|
if (i + 1 < len) {
|
|
temp = data[i];
|
|
data[i] = data[i+1];
|
|
data[i+1] = temp;
|
|
}
|
|
}
|
|
}
|
|
|
|
void word_swap(unsigned char* data, int len)
|
|
{
|
|
Uint16 temp;
|
|
Uint16* ptr = (Uint16*)data;
|
|
Int32 i, size = (len + (int)sizeof(Uint16) -1)/(int)sizeof(Uint16);
|
|
|
|
for (i=0; i<size; i+=2) {
|
|
temp = ptr[i];
|
|
ptr[i] = ptr[i+1];
|
|
ptr[i+1] = temp;
|
|
}
|
|
}
|
|
|
|
void dword_swap(unsigned char* data, int len)
|
|
{
|
|
Uint32 temp;
|
|
Uint32* ptr = (Uint32*)data;
|
|
Int32 i, size = (len + (int)sizeof(Uint32) -1)/(int)sizeof(Uint32);
|
|
|
|
for (i=0; i<size; i+=2) {
|
|
temp = ptr[i];
|
|
ptr[i] = ptr[i+1];
|
|
ptr[i+1] = temp;
|
|
}
|
|
}
|
|
|
|
void lword_swap(unsigned char* data, int len)
|
|
{
|
|
Uint64 temp;
|
|
Uint64* ptr = (Uint64*)data;
|
|
Int32 i, size = (len + (int)sizeof(Uint64) -1)/(int)sizeof(Uint64);
|
|
|
|
for (i=0; i<size; i+=2) {
|
|
temp = ptr[i];
|
|
ptr[i] = ptr[i+1];
|
|
ptr[i+1] = temp;
|
|
}
|
|
}
|
|
|
|
int swap_endian(u32 core_idx, unsigned char *data, int len, int endian)
|
|
{
|
|
vdi_info_t *vdi;
|
|
int changes;
|
|
int sys_endian;
|
|
BOOL byteChange, wordChange, dwordChange, lwordChange;
|
|
|
|
if (core_idx >= MAX_NUM_VPU_CORE)
|
|
return -1;
|
|
|
|
vdi = &s_vdi_info[core_idx];
|
|
|
|
if (!vdi || vdi->vpu_fd == -1 ||
|
|
vdi_init_flag[core_idx] == INIT_VDI_STAT_NULL)
|
|
return -1;
|
|
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
sys_endian = VDI_128BIT_BUS_SYSTEM_ENDIAN;
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
|
|
endian = vdi_convert_endian(core_idx, endian);
|
|
sys_endian = vdi_convert_endian(core_idx, sys_endian);
|
|
if (endian == sys_endian)
|
|
return 0;
|
|
|
|
if (PRODUCT_CODE_VP_SERIES(vdi->product_code)) {
|
|
}
|
|
else {
|
|
VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
|
|
return -1;
|
|
}
|
|
|
|
changes = endian ^ sys_endian;
|
|
byteChange = changes&0x01;
|
|
wordChange = ((changes&0x02) == 0x02);
|
|
dwordChange = ((changes&0x04) == 0x04);
|
|
lwordChange = ((changes&0x08) == 0x08);
|
|
|
|
if (byteChange) byte_swap(data, len);
|
|
if (wordChange) word_swap(data, len);
|
|
if (dwordChange) dword_swap(data, len);
|
|
if (lwordChange) lword_swap(data, len);
|
|
|
|
return 1;
|
|
}
|