41 lines
2.0 KiB
C
41 lines
2.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __A4_H
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#define __A4_H
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#define ANACTRL_FIXPLL_CTRL3 (0x0013 << 2)
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#define ANACTRL_GP0PLL_CTRL0 (0x0020 << 2)
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#define ANACTRL_GP0PLL_CTRL1 (0x0021 << 2)
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#define ANACTRL_GP0PLL_CTRL2 (0x0022 << 2)
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#define ANACTRL_GP0PLL_CTRL3 (0x0023 << 2)
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#define ANACTRL_HIFIPLL_CTRL0 (0x0040 << 2)
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#define ANACTRL_HIFIPLL_CTRL1 (0x0041 << 2)
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#define ANACTRL_HIFIPLL_CTRL2 (0x0042 << 2)
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#define ANACTRL_HIFIPLL_CTRL3 (0x0043 << 2)
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#define CLKCTRL_RTC_BY_OSCIN_CTRL0 (0x0002 << 2)
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#define CLKCTRL_RTC_BY_OSCIN_CTRL1 (0x0003 << 2)
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#define CLKCTRL_RTC_CTRL (0x0004 << 2)
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#define CLKCTRL_SYS_CLK_EN0_REG0 (0x0011 << 2)
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#define CLKCTRL_SYS_CLK_EN0_REG1 (0x0012 << 2)
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#define CLKCTRL_CLK12_24_CTRL (0x002a << 2)
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#define CLKCTRL_AXI_CLK_EN0 (0x002b << 2)
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#define CLKCTRL_TS_CLK_CTRL (0x0056 << 2)
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#define CLKCTRL_ETH_CLK_CTRL (0x0059 << 2)
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#define CLKCTRL_NAND_CLK_CTRL (0x005a << 2)
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#define CLKCTRL_SD_EMMC_CLK_CTRL (0x005b << 2)
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#define CLKCTRL_SPICC_CLK_CTRL (0x005d << 2)
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#define CLKCTRL_GEN_CLK_CTRL (0x005e << 2)
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#define CLKCTRL_SAR_CLK_CTRL0 (0x005f << 2)
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#define CLKCTRL_PWM_CLK_AB_CTRL (0x0060 << 2)
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#define CLKCTRL_PWM_CLK_CD_CTRL (0x0061 << 2)
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#define CLKCTRL_PWM_CLK_EF_CTRL (0x0062 << 2)
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#define CLKCTRL_PWM_CLK_GH_CTRL (0x0063 << 2)
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#define CLKCTRL_VOUTENC_CLK_CTRL (0x0081 << 2)
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#define CLKCTRL_AUDIO_CLK_CTRL (0x0082 << 2)
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#endif /* __A4_H */
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