143 lines
3.2 KiB
C
143 lines
3.2 KiB
C
/*
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* Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include "mailbox-irq.h"
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#include "mailbox_soc.h"
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#include "common.h"
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#define AOTAG "AOCPU"
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#define PRINT_DBG(...) //printf(__VA_ARGS__)
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#define PRINT_ERR(...) printf(__VA_ARGS__)
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#define NO_DISABLE_IRQ 1
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#define aml_writel32(val, reg) (REG32(reg) = val)
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#define aml_readl32(reg) (REG32(reg))
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struct xHandlerTableEntry xMbHandlerTable[IRQ_MAX];
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void vMbDefaultHandler(void *vArg)
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{
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(void)vArg;
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}
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void vSetMbIrqHandler(unsigned int xNum, vHandlerFunc vHandler, void *vArg, unsigned int xPriority)
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{
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PRINT_DBG("%s xNum:%d\n", __func__, xNum);
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if (vHandler == NULL) {
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xMbHandlerTable[xNum].vHandler = &vMbDefaultHandler;
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xMbHandlerTable[xNum].vArg = NULL;
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} else {
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xMbHandlerTable[xNum].vHandler = vHandler;
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xMbHandlerTable[xNum].vArg = vArg;
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}
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xMbHandlerTable[xNum].xPriority = xPriority;
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}
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void vMbSetIrqPriority(unsigned int xNum, unsigned int xPriority)
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{
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xMbHandlerTable[xNum].xPriority = xPriority;
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}
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#if (IRQ_MAX == 64)
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void vEnableMbInterrupt(uint64_t xMask)
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#else
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void vEnableMbInterrupt(uint32_t xMask)
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#endif
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{
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#ifndef NO_DISABLE_IRQ
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#if (IRQ_MAX == 64)
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uint32_t ulValHigh = 0;
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uint32_t ulValLow = 0;
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uint32_t ulMaskHigh = 0;
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uint32_t ulMaskLow = 0;
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ulMaskHigh = (uint32_t)(xMask >> 32);
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ulMaskLow = (uint32_t)(xMask & 0xFFFFFFFF);
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ulValHigh = aml_readl32(MAILBOX_IRQ_MASK1) | ulMaskHigh;
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ulValLow = aml_readl32(MAILBOX_IRQ_MASK) | ulMaskLow;
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aml_writel32(ulMaskHigh, MAILBOX_IRQ_MASK1);
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aml_writel32(ulMaskLow, MAILBOX_IRQ_MASK);
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#else
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uint32_t ulVal = 0;
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ulVal = aml_readl32(MAILBOX_IRQ_MASK) | xMask;
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aml_writel32(ulVal, MAILBOX_IRQ_MASK);
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#endif /* #if (IRQ_MAX == 64) */
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#else
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(void)xMask;
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#endif /* #ifndef NO_DISABLE_IRQ */
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}
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#if (IRQ_MAX == 64)
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void vDisableMbInterrupt(uint64_t xMask)
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#else
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void vDisableMbInterrupt(uint32_t xMask)
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#endif
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{
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#ifndef NO_DISABLE_IRQ
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#if (IRQ_MAX == 64)
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uint32_t ulValHigh = 0;
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uint32_t ulValLow = 0;
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uint32_t ulMaskHigh = 0;
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uint32_t ulMaskLow = 0;
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ulValHigh = (uint32_t)(xMask >> 32);
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ulValLow = (uint32_t)(xMask & 0xFFFFFFFF);
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ulValHigh = aml_readl32(MAILBOX_IRQ_MASK1) & (~ulValHigh);
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ulValLow = aml_readl32(MAILBOX_IRQ_MASK) & (~ulValLow);
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aml_writel32(ulValHigh, MAILBOX_IRQ_MASK1);
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aml_writel32(ulValLow, MAILBOX_IRQ_MASK);
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#else
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uint32_t ulVal = 0;
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ulVal = aml_readl32(MAILBOX_IRQ_MASK) & (~xMask);
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aml_writel32(ulVal, MAILBOX_IRQ_MASK);
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#endif /* #if (IRQ_MAX == 64) */
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#else
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(void)xMask;
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#endif /* #ifndef NO_DISABLE_IRQ */
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}
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#if (IRQ_MAX == 64)
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void vClrMbInterrupt(uint64_t xMask)
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#else
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void vClrMbInterrupt(uint32_t xMask)
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#endif
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{
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#if (IRQ_MAX == 64)
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uint32_t lval = 0, hval = 0;
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lval = xMask & 0xffffffff;
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hval = (xMask >> 32) & 0xffffffff;
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aml_writel32(lval, MAILBOX_IRQ_CLR);
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aml_writel32(hval, MAILBOX_IRQ_CLR1);
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#else
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aml_writel32(xMask, MAILBOX_IRQ_CLR);
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#endif
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}
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uint64_t xGetMbIrqStats(void)
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{
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#if (IRQ_MAX == 64)
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uint64_t val = 0;
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uint32_t lval = 0, hval = 0;
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lval = aml_readl32(MAILBOX_IRQ_STS);
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hval = aml_readl32(MAILBOX_IRQ_STS1);
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val = hval;
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val = ((val & 0xffffffff) << 32) | lval;
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return val;
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#else
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return aml_readl32(MAILBOX_IRQ_STS);
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#endif
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}
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