18 lines
385 B
Plaintext
18 lines
385 B
Plaintext
# Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
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# SPDX-License-Identifier: MIT
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config SOC_C5
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bool "C5"
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select RISCV
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select STICK_MEM
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select AOCPU_ALIVE_DETECTION
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select AOCPU_BUSRESPERR_DETECTION
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select BL30_VERSION_SAVE
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select STACK_PROTECTOR_STRONG
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select TIMEBASE_MTIME
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select AO_TICKLESS_TIMER_FREQ_SWITCH
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select AOCPU_PSO
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help
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Enable C5 SOC of RISCV.
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