1105 lines
32 KiB
C
1105 lines
32 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
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/*
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* Copyright (C) 2025 Amlogic, Inc. All rights reserved
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*/
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#include <linux/cleanup.h>
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#include <linux/pm_runtime.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-mc.h>
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#include <media/videobuf2-dma-contig.h>
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#include "c4-isp-common.h"
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#include "hw/c4-isp-hw.h"
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#include "hw/c4-isp-regs.h"
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#define C4_IPP_CAP_OUT_PORT_OFFSET 0
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static const struct c4_isp_cap_format_info ipp_cap_formats[] = {
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/* RAW10 */
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{
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.code = MEDIA_BUS_FMT_SBGGR10_1X10,
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.fourcc = V4L2_PIX_FMT_SBGGR10,
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.num_planes = 1,
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.bpp[0] = 10,
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}, {
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.code = MEDIA_BUS_FMT_SGBRG10_1X10,
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.fourcc = V4L2_PIX_FMT_SGBRG10,
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.num_planes = 1,
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.bpp[0] = 10,
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}, {
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.code = MEDIA_BUS_FMT_SGRBG10_1X10,
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.fourcc = V4L2_PIX_FMT_SGRBG10,
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.num_planes = 1,
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.bpp[0] = 10,
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}, {
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.code = MEDIA_BUS_FMT_SRGGB10_1X10,
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.fourcc = V4L2_PIX_FMT_SRGGB10,
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.num_planes = 1,
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.bpp[0] = 10,
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},
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/* RAW12 */
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{
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.code = MEDIA_BUS_FMT_SBGGR12_1X12,
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.fourcc = V4L2_PIX_FMT_SBGGR12,
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.num_planes = 1,
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.bpp[0] = 12,
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}, {
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.code = MEDIA_BUS_FMT_SGBRG12_1X12,
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.fourcc = V4L2_PIX_FMT_SGBRG12,
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.num_planes = 1,
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.bpp[0] = 12,
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}, {
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.code = MEDIA_BUS_FMT_SGRBG12_1X12,
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.fourcc = V4L2_PIX_FMT_SGRBG12,
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.num_planes = 1,
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.bpp[0] = 12,
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}, {
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.code = MEDIA_BUS_FMT_SRGGB12_1X12,
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.fourcc = V4L2_PIX_FMT_SRGGB12,
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.num_planes = 1,
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.bpp[0] = 12,
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},
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/* YUV */
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{
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fourcc = V4L2_PIX_FMT_UYVY,
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.num_planes = 1,
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.bpp[0] = 16,
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}, {
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fourcc = V4L2_PIX_FMT_YVYU,
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.num_planes = 1,
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.bpp[0] = 16,
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}, {
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fourcc = V4L2_PIX_FMT_YUYV,
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.num_planes = 1,
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.bpp[0] = 16,
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}, {
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fourcc = V4L2_PIX_FMT_VYUY,
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.num_planes = 1,
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.bpp[0] = 16,
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}, {
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.code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fourcc = V4L2_PIX_FMT_NV12M,
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.num_planes = 2,
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.bpp[0] = 8,
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.bpp[1] = 16,
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.hdiv = 2,
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.vdiv = 2,
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}
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};
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static int c4_ipp_cap_dummy_buff_create(struct c4_isp_capture *cap)
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{
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struct c4_isp_data_buffer *dummy_buff = &cap->dummy_buff;
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struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
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if (pix_mp->num_planes == 1)
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dummy_buff->size = pix_mp->plane_fmt[C4_ISP_PLANE_Y].sizeimage;
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else
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dummy_buff->size =
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MAX(pix_mp->plane_fmt[C4_ISP_PLANE_Y].sizeimage,
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pix_mp->plane_fmt[C4_ISP_PLANE_UV].sizeimage);
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/* The driver never access vaddr, no mapping is required */
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dummy_buff->vaddr = dma_alloc_attrs(cap->isp->dev, dummy_buff->size,
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&dummy_buff->dma_addr, GFP_KERNEL,
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DMA_ATTR_NO_KERNEL_MAPPING);
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if (!dummy_buff->vaddr)
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return -ENOMEM;
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return 0;
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}
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static void c4_ipp_cap_dummy_buff_destroy(struct c4_isp_capture *cap)
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{
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dma_free_attrs(cap->isp->dev, cap->dummy_buff.size,
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cap->dummy_buff.vaddr, cap->dummy_buff.dma_addr,
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DMA_ATTR_NO_KERNEL_MAPPING);
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}
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static void c4_ipp_cap_sync_cfg_port(struct c4_isp_capture *cap)
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{
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const struct c4_isp_cap_format_info *info = cap->format.info;
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if (cap->isp->info->id == C4_ISP_VIRT_0) {
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if (info->num_planes == 1) {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER0_WMIF, C4_IPP_OTHER_OUT_0);
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} else {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER0_WMIF, C4_IPP_OTHER_OUT_0);
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER1_WMIF,
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C4_IPP_OTHER_OUT_4 - C4_IPP_CAP_OUT_PORT_OFFSET);
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}
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} else if (cap->isp->info->id == C4_ISP_VIRT_1) {
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if (info->num_planes == 1) {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER1_WMIF, C4_IPP_OTHER_OUT_1);
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} else {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER0_WMIF, C4_IPP_OTHER_OUT_1);
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER1_WMIF,
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C4_IPP_OTHER_OUT_5 - C4_IPP_CAP_OUT_PORT_OFFSET);
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}
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} else if (cap->isp->info->id == C4_ISP_VIRT_2) {
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if (info->num_planes == 1) {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER2_WMIF, C4_IPP_OTHER_OUT_2);
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} else {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER2_WMIF, C4_IPP_OTHER_OUT_2);
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER3_WMIF, C4_IPP_OTHER_OUT_6);
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}
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} else {
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if (info->num_planes == 1) {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER3_WMIF, C4_IPP_OTHER_OUT_3);
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} else {
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER2_WMIF, C4_IPP_OTHER_OUT_3);
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER3_WMIF, C4_IPP_OTHER_OUT_7);
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}
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}
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}
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static void c4_ipp_cap_sep_cfg_port(struct c4_isp_capture *cap)
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{
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if (cap->id == C4_ISP_CAP_DEV_0)
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER0_WMIF, C4_IPP_OTHER_OUT_8);
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else if (cap->id == C4_ISP_CAP_DEV_1)
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER1_WMIF, C4_IPP_OTHER_OUT_9);
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else if (cap->id == C4_ISP_CAP_DEV_2)
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER2_WMIF, C4_IPP_OTHER_OUT_10);
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else
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c4_isp_intf_cfg_other_out(cap->isp, C4_ISP_USER3_WMIF, C4_IPP_OTHER_OUT_11);
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}
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static void c4_ipp_cap_cfg_port(struct c4_isp_capture *cap)
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{
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enum c4_ipp_work_mode work_mode = cap->isp->ipp.cfg_info.work_mode;
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const struct c4_isp_cap_format_info *info = cap->format.info;
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c4_ipp_rdma_mutex_lock(cap->isp, true);
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c4_ipp_rdma_work_flag(cap->isp, true);
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if (work_mode == C4_IPP_SINGLE_VC_MODE ||
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work_mode == C4_IPP_MULTI_VC_SYNC_MODE)
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c4_ipp_cap_sync_cfg_port(cap);
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else
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c4_ipp_cap_sep_cfg_port(cap);
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c4_isp_intf_cfg_planes_mode(cap->isp, info->num_planes);
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if (info->vdiv == 2) {
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c4_isp_intf_cfg_loss_mode(cap->isp, true);
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c4_isp_intf_cfg_yuv420_mode(cap->isp, true);
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} else {
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c4_isp_intf_cfg_loss_mode(cap->isp, false);
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c4_isp_intf_cfg_yuv420_mode(cap->isp, false);
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}
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c4_ipp_rdma_mutex_lock(cap->isp, false);
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c4_ipp_rdma_work_flag(cap->isp, false);
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}
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static void c4_ipp_cap_sync_cfg_1p_fmt(struct c4_isp_capture *cap)
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{
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struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
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const struct c4_isp_cap_format_info *info = cap->format.info;
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struct c4_isp_pyr_wmif_params wmif;
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enum c4_isp_pyr_wmif_ids idwmif_id;
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enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
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u32 sub_frame_chnl = 0;
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u32 sub_frame_height = pix_mp->height / cap->sub_frame_num;
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idwmif_id = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
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C4_ISP_USER3_WMIF;
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idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
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cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
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cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
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C4_ISP_PYR_WMIF_CHNL_3;
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for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
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wmif.id = idwmif_id;
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wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
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wmif.src_hsize = pix_mp->width;
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wmif.src_vsize = sub_frame_height;
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wmif.src_bits = info->bpp[0];
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wmif.ldf_vsize = 0;
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wmif.ldf_en = false;
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c4_isp_febe_cfg_user_wmif_fmt(cap->isp, &wmif);
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}
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}
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static void c4_ipp_cap_sync_cfg_2p_fmt(struct c4_isp_capture *cap)
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{
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struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
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const struct c4_isp_cap_format_info *info = cap->format.info;
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struct c4_isp_pyr_wmif_params wmif;
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enum c4_isp_pyr_wmif_ids idwmif_id_y;
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enum c4_isp_pyr_wmif_ids idwmif_id_c;
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enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
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u32 sub_frame_chnl = 0;
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u32 sub_frame_height = pix_mp->height / cap->sub_frame_num;
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idwmif_id_y = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
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C4_ISP_USER2_WMIF;
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idwmif_id_c = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER3_WMIF :
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C4_ISP_USER3_WMIF;
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idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
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cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
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cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
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C4_ISP_PYR_WMIF_CHNL_3;
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for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
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wmif.id = idwmif_id_y;
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wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
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wmif.src_hsize = pix_mp->width / 2;
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wmif.src_vsize = sub_frame_height;
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wmif.src_bits = info->bpp[0] * 2;
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wmif.ldf_vsize = 0;
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wmif.ldf_en = false;
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c4_isp_febe_cfg_user_wmif_fmt(cap->isp, &wmif);
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wmif.id = idwmif_id_c;
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wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
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wmif.src_hsize = pix_mp->width / info->hdiv;
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wmif.src_vsize = sub_frame_height / info->vdiv;
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wmif.src_bits = info->bpp[1];
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wmif.ldf_vsize = 0;
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wmif.ldf_en = false;
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c4_isp_febe_cfg_user_wmif_fmt(cap->isp, &wmif);
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}
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}
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static void c4_ipp_cap_sync_cfg_fmt(struct c4_isp_capture *cap)
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{
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const struct c4_isp_cap_format_info *info = cap->format.info;
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if (info->num_planes == 1)
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c4_ipp_cap_sync_cfg_1p_fmt(cap);
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else
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c4_ipp_cap_sync_cfg_2p_fmt(cap);
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}
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static void c4_ipp_cap_sync_cfg_1p_buff(struct c4_isp_capture *cap)
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{
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struct c4_isp_pyr_wmif_params wmif;
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enum c4_isp_pyr_wmif_ids idwmif_id;
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enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
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dma_addr_t vc_addr;
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u32 sub_frame_chnl = 0;
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struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
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u32 sub_frame_size = pix_mp->plane_fmt[0].sizeimage / cap->sub_frame_num;
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if (cap->buff)
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vc_addr = cap->buff->dma_addr[C4_ISP_PLANE_Y];
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else
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vc_addr = cap->dummy_buff.dma_addr;
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idwmif_id = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
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C4_ISP_USER3_WMIF;
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idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
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cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
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cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
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C4_ISP_PYR_WMIF_CHNL_3;
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for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
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wmif.id = idwmif_id;
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wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
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wmif.addr = vc_addr + sub_frame_size * sub_frame_chnl;
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c4_isp_febe_cfg_user_wmif_buff(cap->isp, &wmif);
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}
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}
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static void c4_ipp_cap_sync_cfg_2p_buff(struct c4_isp_capture *cap)
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{
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struct c4_isp_pyr_wmif_params wmif;
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enum c4_isp_pyr_wmif_ids idwmif_id_y;
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enum c4_isp_pyr_wmif_ids idwmif_id_c;
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enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
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dma_addr_t vc_addr_y;
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dma_addr_t vc_addr_c;
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u32 sub_frame_chnl = 0;
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struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
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u32 sub_frame_y_size = pix_mp->plane_fmt[0].sizeimage / cap->sub_frame_num;
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u32 sub_frame_c_size = pix_mp->plane_fmt[1].sizeimage / cap->sub_frame_num;
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if (cap->buff) {
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vc_addr_y = cap->buff->dma_addr[C4_ISP_PLANE_Y];
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vc_addr_c = cap->buff->dma_addr[C4_ISP_PLANE_UV];
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} else {
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vc_addr_y = cap->dummy_buff.dma_addr;
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vc_addr_c = cap->dummy_buff.dma_addr;
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}
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idwmif_id_y = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER0_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
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C4_ISP_USER2_WMIF;
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idwmif_id_c = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
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cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER3_WMIF :
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C4_ISP_USER3_WMIF;
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idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
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cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
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cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
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C4_ISP_PYR_WMIF_CHNL_3;
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for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
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wmif.id = idwmif_id_y;
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wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
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wmif.addr = vc_addr_y + sub_frame_y_size * sub_frame_chnl;
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c4_isp_febe_cfg_user_wmif_buff(cap->isp, &wmif);
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|
|
wmif.id = idwmif_id_c;
|
|
wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
|
|
wmif.addr = vc_addr_c + sub_frame_c_size * sub_frame_chnl;
|
|
c4_isp_febe_cfg_user_wmif_buff(cap->isp, &wmif);
|
|
}
|
|
}
|
|
|
|
static void c4_ipp_cap_sync_cfg_buff(struct c4_isp_capture *cap)
|
|
{
|
|
const struct c4_isp_cap_format_info *info = cap->format.info;
|
|
|
|
if (info->num_planes == 1)
|
|
c4_ipp_cap_sync_cfg_1p_buff(cap);
|
|
else
|
|
c4_ipp_cap_sync_cfg_2p_buff(cap);
|
|
}
|
|
|
|
static void c4_ipp_cap_sync_1p_enable(struct c4_isp_capture *cap, bool enable)
|
|
{
|
|
struct c4_isp_pyr_wmif_params wmif;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id;
|
|
enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
|
|
u32 sub_frame_chnl = 0;
|
|
|
|
idwmif_id = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
|
|
C4_ISP_USER3_WMIF;
|
|
idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
|
|
cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
|
|
cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
|
|
C4_ISP_PYR_WMIF_CHNL_3;
|
|
for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
|
|
wmif.id = idwmif_id;
|
|
wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
|
|
wmif.enable = enable ? IDWMIF_CFG_0_EN : IDWMIF_CFG_0_DIS;
|
|
c4_isp_febe_user_wmif_enable(cap->isp, &wmif);
|
|
}
|
|
}
|
|
|
|
static void c4_ipp_cap_sync_2p_enable(struct c4_isp_capture *cap, bool enable)
|
|
{
|
|
struct c4_isp_pyr_wmif_params wmif;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id_y;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id_c;
|
|
enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
|
|
u32 sub_frame_chnl = 0;
|
|
|
|
idwmif_id_y = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER0_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER0_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER2_WMIF :
|
|
C4_ISP_USER2_WMIF;
|
|
idwmif_id_c = cap->isp->info->id == C4_ISP_VIRT_0 ? C4_ISP_USER1_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_1 ? C4_ISP_USER1_WMIF :
|
|
cap->isp->info->id == C4_ISP_VIRT_2 ? C4_ISP_USER3_WMIF :
|
|
C4_ISP_USER3_WMIF;
|
|
idwmif_chnl_id = cap->id == C4_IPP_CAP_DEV_0 ? C4_ISP_PYR_WMIF_CHNL_0 :
|
|
cap->id == C4_IPP_CAP_DEV_1 ? C4_ISP_PYR_WMIF_CHNL_1 :
|
|
cap->id == C4_IPP_CAP_DEV_2 ? C4_ISP_PYR_WMIF_CHNL_2 :
|
|
C4_ISP_PYR_WMIF_CHNL_3;
|
|
|
|
for (sub_frame_chnl = 0; sub_frame_chnl < cap->sub_frame_num; sub_frame_chnl++) {
|
|
wmif.id = idwmif_id_y;
|
|
wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
|
|
wmif.enable = enable ? IDWMIF_CFG_0_EN : IDWMIF_CFG_0_DIS;
|
|
c4_isp_febe_user_wmif_enable(cap->isp, &wmif);
|
|
|
|
wmif.id = idwmif_id_c;
|
|
wmif.chnl = idwmif_chnl_id + sub_frame_chnl;
|
|
wmif.enable = enable ? IDWMIF_CFG_0_EN : IDWMIF_CFG_0_DIS;
|
|
c4_isp_febe_user_wmif_enable(cap->isp, &wmif);
|
|
}
|
|
}
|
|
|
|
static void c4_ipp_cap_sync_enable(struct c4_isp_capture *cap, bool enable)
|
|
{
|
|
const struct c4_isp_cap_format_info *info = cap->format.info;
|
|
|
|
if (info->num_planes == 1)
|
|
c4_ipp_cap_sync_1p_enable(cap, enable);
|
|
else
|
|
c4_ipp_cap_sync_2p_enable(cap, enable);
|
|
}
|
|
|
|
static void c4_ipp_cap_sep_cfg_fmt(struct c4_isp_capture *cap)
|
|
{
|
|
struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
|
|
const struct c4_isp_cap_format_info *info = cap->format.info;
|
|
struct c4_isp_pyr_wmif_params wmif;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id;
|
|
enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
|
|
|
|
if (cap->id == C4_IPP_CAP_DEV_0) {
|
|
idwmif_id = C4_ISP_USER0_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_1) {
|
|
idwmif_id = C4_ISP_USER1_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_2) {
|
|
idwmif_id = C4_ISP_USER2_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else {
|
|
idwmif_id = C4_ISP_USER3_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
}
|
|
|
|
wmif.id = idwmif_id;
|
|
wmif.chnl = idwmif_chnl_id;
|
|
wmif.src_hsize = pix_mp->width;
|
|
wmif.src_vsize = pix_mp->height;
|
|
wmif.src_bits = info->bpp[0];
|
|
wmif.ldf_vsize = 0;
|
|
wmif.ldf_en = false;
|
|
c4_isp_febe_cfg_user_wmif_fmt(cap->isp, &wmif);
|
|
}
|
|
|
|
static void c4_ipp_cap_sep_cfg_buff(struct c4_isp_capture *cap)
|
|
{
|
|
struct c4_isp_pyr_wmif_params wmif;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id;
|
|
enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
|
|
dma_addr_t vc_addr;
|
|
|
|
if (cap->buff)
|
|
vc_addr = cap->buff->dma_addr[C4_ISP_PLANE_Y];
|
|
else
|
|
vc_addr = cap->dummy_buff.dma_addr;
|
|
|
|
if (cap->id == C4_IPP_CAP_DEV_0) {
|
|
idwmif_id = C4_ISP_USER0_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_1) {
|
|
idwmif_id = C4_ISP_USER1_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_2) {
|
|
idwmif_id = C4_ISP_USER2_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else {
|
|
idwmif_id = C4_ISP_USER3_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
}
|
|
|
|
wmif.id = idwmif_id;
|
|
wmif.chnl = idwmif_chnl_id;
|
|
wmif.addr = vc_addr;
|
|
c4_isp_febe_cfg_user_wmif_buff(cap->isp, &wmif);
|
|
}
|
|
|
|
static void c4_ipp_cap_sep_enable(struct c4_isp_capture *cap, bool enable)
|
|
{
|
|
struct c4_isp_pyr_wmif_params wmif;
|
|
enum c4_isp_pyr_wmif_ids idwmif_id;
|
|
enum c4_isp_pyr_wmif_chnl idwmif_chnl_id;
|
|
|
|
if (cap->id == C4_IPP_CAP_DEV_0) {
|
|
idwmif_id = C4_ISP_USER0_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_1) {
|
|
idwmif_id = C4_ISP_USER1_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else if (cap->id == C4_IPP_CAP_DEV_2) {
|
|
idwmif_id = C4_ISP_USER2_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
} else {
|
|
idwmif_id = C4_ISP_USER3_WMIF;
|
|
idwmif_chnl_id = C4_ISP_PYR_WMIF_CHNL_0;
|
|
}
|
|
|
|
wmif.id = idwmif_id;
|
|
wmif.chnl = idwmif_chnl_id;
|
|
wmif.enable = enable ? IDWMIF_CFG_0_EN : IDWMIF_CFG_0_DIS;
|
|
c4_isp_febe_user_wmif_enable(cap->isp, &wmif);
|
|
}
|
|
|
|
static void c4_ipp_cap_cfg_buff(struct c4_isp_capture *cap)
|
|
{
|
|
struct c4_ipp_cfg_info *ipp_cfg_info = &cap->isp->ipp.cfg_info;
|
|
|
|
cap->buff = list_first_entry_or_null(&cap->pending,
|
|
struct c4_isp_cap_buffer, list);
|
|
|
|
if (ipp_cfg_info->work_mode == C4_IPP_SINGLE_VC_MODE ||
|
|
ipp_cfg_info->work_mode == C4_IPP_MULTI_VC_SYNC_MODE)
|
|
c4_ipp_cap_sync_cfg_buff(cap);
|
|
else
|
|
c4_ipp_cap_sep_cfg_buff(cap);
|
|
|
|
if (cap->buff)
|
|
list_del(&cap->buff->list);
|
|
}
|
|
|
|
static void c4_ipp_cap_start(struct c4_isp_capture *cap)
|
|
{
|
|
enum c4_ipp_work_mode work_mode = cap->isp->ipp.cfg_info.work_mode;
|
|
|
|
scoped_guard(spinlock_irqsave, &cap->buff_lock) {
|
|
c4_ipp_cap_cfg_buff(cap);
|
|
}
|
|
|
|
if (work_mode == C4_IPP_SINGLE_VC_MODE ||
|
|
work_mode == C4_IPP_MULTI_VC_SYNC_MODE) {
|
|
c4_ipp_cap_sync_cfg_fmt(cap);
|
|
c4_ipp_cap_sync_enable(cap, true);
|
|
} else {
|
|
c4_ipp_cap_sep_cfg_fmt(cap);
|
|
c4_ipp_cap_sep_enable(cap, true);
|
|
}
|
|
|
|
c4_ipp_cap_cfg_port(cap);
|
|
}
|
|
|
|
static void c4_ipp_cap_stop(struct c4_isp_capture *cap)
|
|
{
|
|
enum c4_ipp_work_mode work_mode = cap->isp->ipp.cfg_info.work_mode;
|
|
|
|
if (work_mode == C4_IPP_SINGLE_VC_MODE ||
|
|
work_mode == C4_IPP_MULTI_VC_SYNC_MODE)
|
|
c4_ipp_cap_sync_enable(cap, false);
|
|
else
|
|
c4_ipp_cap_sep_enable(cap, false);
|
|
}
|
|
|
|
static void c4_ipp_cap_done(struct c4_isp_capture *cap)
|
|
{
|
|
struct c4_isp_cap_buffer *buff = cap->buff;
|
|
|
|
guard(spinlock_irqsave)(&cap->buff_lock);
|
|
|
|
if (buff) {
|
|
buff->vb.sequence = cap->isp->ipp_frm_seq;
|
|
buff->vb.vb2_buf.timestamp = ktime_get();
|
|
buff->vb.field = V4L2_FIELD_NONE;
|
|
vb2_buffer_done(&buff->vb.vb2_buf, VB2_BUF_STATE_DONE);
|
|
}
|
|
|
|
c4_ipp_cap_cfg_buff(cap);
|
|
}
|
|
|
|
/* V4L2 video operations */
|
|
|
|
static const struct c4_isp_cap_format_info *c4_ipp_cap_find_fmt(u32 fourcc)
|
|
{
|
|
for (unsigned int i = 0; i < ARRAY_SIZE(ipp_cap_formats); i++) {
|
|
if (ipp_cap_formats[i].fourcc == fourcc)
|
|
return &ipp_cap_formats[i];
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static void c4_ipp_cap_try_fmt(struct v4l2_pix_format_mplane *pix_mp)
|
|
{
|
|
const struct c4_isp_cap_format_info *fmt;
|
|
struct v4l2_plane_pix_format *plane;
|
|
|
|
fmt = c4_ipp_cap_find_fmt(pix_mp->pixelformat);
|
|
if (!fmt)
|
|
fmt = &ipp_cap_formats[0];
|
|
|
|
pix_mp->width = clamp(pix_mp->width, C4_ISP_MIN_WIDTH,
|
|
C4_ISP_MAX_WIDTH);
|
|
pix_mp->height = clamp(pix_mp->height, C4_ISP_MIN_HEIGHT,
|
|
C4_ISP_MAX_HEIGHT);
|
|
pix_mp->pixelformat = fmt->fourcc;
|
|
pix_mp->field = V4L2_FIELD_NONE;
|
|
pix_mp->colorspace = V4L2_COLORSPACE_RAW;
|
|
pix_mp->ycbcr_enc = V4L2_YCBCR_ENC_601;
|
|
pix_mp->quantization = V4L2_QUANTIZATION_FULL_RANGE;
|
|
|
|
pix_mp->num_planes = fmt->num_planes;
|
|
memset(pix_mp->plane_fmt, 0, sizeof(pix_mp->plane_fmt));
|
|
|
|
for (unsigned int i = 0; i < fmt->num_planes; i++) {
|
|
unsigned int hdiv = (i == 0) ? 1 : fmt->hdiv;
|
|
unsigned int vdiv = (i == 0) ? 1 : fmt->vdiv;
|
|
|
|
plane = &pix_mp->plane_fmt[i];
|
|
|
|
plane->bytesperline = DIV_ROUND_UP(pix_mp->width, hdiv) *
|
|
fmt->bpp[i] / BITS_PER_BYTE;
|
|
plane->bytesperline = ALIGN(plane->bytesperline,
|
|
C4_ISP_WMIF_STRIDE_ALIGN_BYTES);
|
|
plane->sizeimage = plane->bytesperline *
|
|
DIV_ROUND_UP(pix_mp->height, vdiv);
|
|
}
|
|
}
|
|
|
|
static void c4_ipp_cap_return_buffers(struct c4_isp_capture *cap,
|
|
enum vb2_buffer_state state)
|
|
{
|
|
struct c4_isp_cap_buffer *buff;
|
|
|
|
guard(spinlock_irqsave)(&cap->buff_lock);
|
|
|
|
if (cap->buff) {
|
|
vb2_buffer_done(&cap->buff->vb.vb2_buf, state);
|
|
cap->buff = NULL;
|
|
}
|
|
|
|
while (!list_empty(&cap->pending)) {
|
|
buff = list_first_entry(&cap->pending,
|
|
struct c4_isp_cap_buffer, list);
|
|
list_del(&buff->list);
|
|
vb2_buffer_done(&buff->vb.vb2_buf, state);
|
|
}
|
|
}
|
|
|
|
static int c4_ipp_cap_querycap(struct file *file, void *fh,
|
|
struct v4l2_capability *cap)
|
|
{
|
|
strscpy(cap->driver, C4_ISP_DRIVER_NAME, sizeof(cap->driver));
|
|
strscpy(cap->card, "AML C4 ISP5", sizeof(cap->card));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_enum_fmt(struct file *file, void *fh,
|
|
struct v4l2_fmtdesc *f)
|
|
{
|
|
const struct c4_isp_cap_format_info *fmt;
|
|
unsigned int index = 0;
|
|
unsigned int i;
|
|
|
|
if (!f->mbus_code) {
|
|
if (f->index >= ARRAY_SIZE(ipp_cap_formats))
|
|
return -EINVAL;
|
|
|
|
fmt = &ipp_cap_formats[f->index];
|
|
f->pixelformat = fmt->fourcc;
|
|
f->mbus_code = fmt->code;
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(ipp_cap_formats); i++) {
|
|
fmt = &ipp_cap_formats[i];
|
|
if (f->mbus_code != fmt->code)
|
|
continue;
|
|
|
|
if (index++ == f->index) {
|
|
f->pixelformat = ipp_cap_formats[i].fourcc;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int c4_ipp_cap_g_fmt_mplane(struct file *file, void *fh,
|
|
struct v4l2_format *f)
|
|
{
|
|
struct c4_isp_capture *cap = video_drvdata(file);
|
|
|
|
f->fmt.pix_mp = cap->format.pix_mp;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_s_fmt_mplane(struct file *file, void *fh,
|
|
struct v4l2_format *f)
|
|
{
|
|
struct c4_isp_capture *cap = video_drvdata(file);
|
|
|
|
c4_ipp_cap_try_fmt(&f->fmt.pix_mp);
|
|
|
|
cap->format.pix_mp = f->fmt.pix_mp;
|
|
cap->format.info = c4_ipp_cap_find_fmt(f->fmt.pix_mp.pixelformat);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_try_fmt_mplane(struct file *file, void *fh,
|
|
struct v4l2_format *f)
|
|
{
|
|
c4_ipp_cap_try_fmt(&f->fmt.pix_mp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_enum_frmsize(struct file *file, void *fh,
|
|
struct v4l2_frmsizeenum *fsize)
|
|
{
|
|
const struct c4_isp_cap_format_info *fmt;
|
|
|
|
if (fsize->index)
|
|
return -EINVAL;
|
|
|
|
fmt = c4_ipp_cap_find_fmt(fsize->pixel_format);
|
|
if (!fmt)
|
|
return -EINVAL;
|
|
|
|
fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
|
|
fsize->stepwise.min_width = C4_ISP_MIN_WIDTH;
|
|
fsize->stepwise.min_height = C4_ISP_MIN_HEIGHT;
|
|
fsize->stepwise.max_width = C4_ISP_MAX_WIDTH;
|
|
fsize->stepwise.max_height = C4_ISP_MAX_HEIGHT;
|
|
fsize->stepwise.step_width = 2;
|
|
fsize->stepwise.step_height = 2;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct v4l2_ioctl_ops ipp_cap_v4l2_ioctl_ops = {
|
|
.vidioc_querycap = c4_ipp_cap_querycap,
|
|
.vidioc_enum_fmt_vid_cap = c4_ipp_cap_enum_fmt,
|
|
.vidioc_g_fmt_vid_cap_mplane = c4_ipp_cap_g_fmt_mplane,
|
|
.vidioc_s_fmt_vid_cap_mplane = c4_ipp_cap_s_fmt_mplane,
|
|
.vidioc_try_fmt_vid_cap_mplane = c4_ipp_cap_try_fmt_mplane,
|
|
.vidioc_reqbufs = vb2_ioctl_reqbufs,
|
|
.vidioc_querybuf = vb2_ioctl_querybuf,
|
|
.vidioc_qbuf = vb2_ioctl_qbuf,
|
|
.vidioc_expbuf = vb2_ioctl_expbuf,
|
|
.vidioc_dqbuf = vb2_ioctl_dqbuf,
|
|
.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
|
|
.vidioc_create_bufs = vb2_ioctl_create_bufs,
|
|
.vidioc_streamon = vb2_ioctl_streamon,
|
|
.vidioc_streamoff = vb2_ioctl_streamoff,
|
|
.vidioc_enum_framesizes = c4_ipp_cap_enum_frmsize,
|
|
.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
|
|
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
|
|
};
|
|
|
|
static const struct v4l2_file_operations ipp_cap_v4l2_fops = {
|
|
.open = v4l2_fh_open,
|
|
.release = vb2_fop_release,
|
|
.poll = vb2_fop_poll,
|
|
.unlocked_ioctl = video_ioctl2,
|
|
.mmap = vb2_fop_mmap,
|
|
};
|
|
|
|
static int c4_ipp_cap_link_validate(struct media_link *link)
|
|
{
|
|
struct video_device *vdev =
|
|
media_entity_to_video_device(link->sink->entity);
|
|
struct v4l2_subdev *sd =
|
|
media_entity_to_v4l2_subdev(link->source->entity);
|
|
struct c4_isp_capture *cap = video_get_drvdata(vdev);
|
|
struct v4l2_subdev_format src_fmt = {
|
|
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
|
|
.pad = link->source->index,
|
|
};
|
|
int ret;
|
|
|
|
ret = v4l2_subdev_call_state_active(sd, pad, get_fmt, &src_fmt);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (src_fmt.format.width != cap->format.pix_mp.width ||
|
|
src_fmt.format.code != cap->format.info->code) {
|
|
dev_err(cap->isp->dev,
|
|
"link %s: %u -> %s: %u not valid: 0x%04x/%ux%u not match 0x%04x/%ux%u\n",
|
|
link->source->entity->name, link->source->index,
|
|
link->sink->entity->name, link->sink->index,
|
|
src_fmt.format.code, src_fmt.format.width,
|
|
src_fmt.format.height, cap->format.info->code,
|
|
cap->format.pix_mp.width, cap->format.pix_mp.height);
|
|
|
|
return -EPIPE;
|
|
}
|
|
// check height; if height not equal, but cap height is multiple of src height
|
|
if (src_fmt.format.height != cap->format.pix_mp.height) {
|
|
if (cap->format.pix_mp.height % src_fmt.format.height != 0) {
|
|
return -EPIPE;
|
|
}
|
|
cap->sub_frame_num = cap->format.pix_mp.height / src_fmt.format.height;
|
|
dev_info(cap->isp->dev, "sub_frame_num: %u\n", cap->sub_frame_num);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static const struct media_entity_operations ipp_cap_entity_ops = {
|
|
.link_validate = c4_ipp_cap_link_validate,
|
|
};
|
|
|
|
static int c4_ipp_cap_vb2_queue_setup(struct vb2_queue *q,
|
|
unsigned int *num_buffers,
|
|
unsigned int *num_planes,
|
|
unsigned int sizes[],
|
|
struct device *alloc_devs[])
|
|
{
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(q);
|
|
const struct v4l2_pix_format_mplane *pix_mp = &cap->format.pix_mp;
|
|
unsigned int i;
|
|
|
|
if (*num_planes) {
|
|
if (*num_planes != pix_mp->num_planes)
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < pix_mp->num_planes; i++)
|
|
if (sizes[i] < pix_mp->plane_fmt[i].sizeimage)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
*num_planes = pix_mp->num_planes;
|
|
for (i = 0; i < pix_mp->num_planes; i++)
|
|
sizes[i] = pix_mp->plane_fmt[i].sizeimage;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void c4_ipp_cap_vb2_buf_queue(struct vb2_buffer *vb)
|
|
{
|
|
struct vb2_v4l2_buffer *v4l2_buf = to_vb2_v4l2_buffer(vb);
|
|
struct c4_isp_cap_buffer *buf =
|
|
container_of(v4l2_buf, struct c4_isp_cap_buffer, vb);
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(vb->vb2_queue);
|
|
|
|
guard(spinlock_irqsave)(&cap->buff_lock);
|
|
|
|
list_add_tail(&buf->list, &cap->pending);
|
|
}
|
|
|
|
static int c4_ipp_cap_vb2_buf_prepare(struct vb2_buffer *vb)
|
|
{
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(vb->vb2_queue);
|
|
unsigned long size;
|
|
|
|
for (unsigned int i = 0; i < cap->format.pix_mp.num_planes; i++) {
|
|
size = cap->format.pix_mp.plane_fmt[i].sizeimage;
|
|
if (vb2_plane_size(vb, i) < size) {
|
|
dev_err(cap->isp->dev,
|
|
"User buffer too small (%ld < %lu)\n",
|
|
vb2_plane_size(vb, i), size);
|
|
return -EINVAL;
|
|
}
|
|
|
|
vb2_set_plane_payload(vb, i, size);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_vb2_buf_init(struct vb2_buffer *vb)
|
|
{
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(vb->vb2_queue);
|
|
struct vb2_v4l2_buffer *v4l2_buf = to_vb2_v4l2_buffer(vb);
|
|
struct c4_isp_cap_buffer *buf =
|
|
container_of(v4l2_buf, struct c4_isp_cap_buffer, vb);
|
|
|
|
for (unsigned int i = 0; i < cap->format.pix_mp.num_planes; i++)
|
|
buf->dma_addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int c4_ipp_cap_vb2_start_streaming(struct vb2_queue *q,
|
|
unsigned int count)
|
|
{
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(q);
|
|
int ret;
|
|
|
|
ret = video_device_pipeline_start(&cap->vdev, &cap->isp->vc_pipe);
|
|
if (ret) {
|
|
dev_err(cap->isp->dev,
|
|
"Failed to start ipp cap pipeline: %d\n", ret);
|
|
goto err_return_buffers;
|
|
}
|
|
|
|
ret = c4_ipp_cap_dummy_buff_create(cap);
|
|
if (ret) {
|
|
dev_err(cap->isp->dev, "Failed to create dummy buff: %d\n", ret);
|
|
goto err_pipeline_stop;
|
|
}
|
|
ret = pm_runtime_resume_and_get(cap->isp->dev);
|
|
if (ret) {
|
|
dev_err(cap->isp->dev, "Failed to resume runtime: %d\n", ret);
|
|
goto err_dummy_destroy;
|
|
}
|
|
|
|
c4_isp_rdma_init_config(cap->isp);
|
|
c4_ipp_cap_start(cap);
|
|
|
|
ret = v4l2_subdev_enable_streams(&cap->isp->ipp.sd,
|
|
C4_IPP_PAD_SOURCE_VIDEO_0 + cap->id,
|
|
BIT(0));
|
|
if (ret) {
|
|
dev_err(cap->isp->dev, "Failed to enable streams: %d\n", ret);
|
|
goto err_ipp_cap_stop;
|
|
}
|
|
return 0;
|
|
|
|
err_ipp_cap_stop:
|
|
c4_ipp_cap_stop(cap);
|
|
c4_isp_rdma_deinit_config(cap->isp);
|
|
pm_runtime_put(cap->isp->dev);
|
|
err_dummy_destroy:
|
|
c4_ipp_cap_dummy_buff_destroy(cap);
|
|
err_pipeline_stop:
|
|
video_device_pipeline_stop(&cap->vdev);
|
|
err_return_buffers:
|
|
c4_ipp_cap_return_buffers(cap, VB2_BUF_STATE_QUEUED);
|
|
return ret;
|
|
}
|
|
|
|
static void c4_ipp_cap_vb2_stop_streaming(struct vb2_queue *q)
|
|
{
|
|
struct c4_isp_capture *cap = vb2_get_drv_priv(q);
|
|
|
|
c4_ipp_cap_stop(cap);
|
|
c4_isp_rdma_deinit_config(cap->isp);
|
|
|
|
c4_ipp_cap_return_buffers(cap, VB2_BUF_STATE_ERROR);
|
|
|
|
v4l2_subdev_disable_streams(&cap->isp->ipp.sd,
|
|
C4_IPP_PAD_SOURCE_VIDEO_0 + cap->id,
|
|
BIT(0));
|
|
|
|
pm_runtime_put(cap->isp->dev);
|
|
|
|
c4_ipp_cap_dummy_buff_destroy(cap);
|
|
|
|
video_device_pipeline_stop(&cap->vdev);
|
|
}
|
|
|
|
static const struct vb2_ops ipp_cap_vb2_ops = {
|
|
.queue_setup = c4_ipp_cap_vb2_queue_setup,
|
|
.buf_queue = c4_ipp_cap_vb2_buf_queue,
|
|
.buf_prepare = c4_ipp_cap_vb2_buf_prepare,
|
|
.buf_init = c4_ipp_cap_vb2_buf_init,
|
|
.wait_prepare = vb2_ops_wait_prepare,
|
|
.wait_finish = vb2_ops_wait_finish,
|
|
.start_streaming = c4_ipp_cap_vb2_start_streaming,
|
|
.stop_streaming = c4_ipp_cap_vb2_stop_streaming,
|
|
};
|
|
|
|
static int c4_ipp_register_cap(struct c4_isp_capture *cap)
|
|
{
|
|
struct video_device *vdev = &cap->vdev;
|
|
struct vb2_queue *vb2_q = &cap->vb2_q;
|
|
int ret;
|
|
|
|
snprintf(vdev->name, sizeof(vdev->name), "c4-ipp-cap%u", cap->id);
|
|
vdev->fops = &ipp_cap_v4l2_fops;
|
|
vdev->ioctl_ops = &ipp_cap_v4l2_ioctl_ops;
|
|
vdev->v4l2_dev = &cap->isp->v4l2_dev;
|
|
vdev->entity.ops = &ipp_cap_entity_ops;
|
|
vdev->lock = &cap->lock;
|
|
vdev->minor = -1;
|
|
vdev->queue = vb2_q;
|
|
vdev->release = video_device_release_empty;
|
|
vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
|
|
V4L2_CAP_STREAMING | V4L2_CAP_IO_MC;
|
|
vdev->vfl_dir = VFL_DIR_RX;
|
|
video_set_drvdata(vdev, cap);
|
|
|
|
vb2_q->drv_priv = cap;
|
|
vb2_q->mem_ops = &vb2_dma_contig_memops;
|
|
vb2_q->ops = &ipp_cap_vb2_ops;
|
|
vb2_q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
|
|
vb2_q->io_modes = VB2_DMABUF | VB2_MMAP;
|
|
vb2_q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
|
|
vb2_q->buf_struct_size = sizeof(struct c4_isp_cap_buffer);
|
|
vb2_q->dev = cap->isp->dev;
|
|
vb2_q->lock = &cap->lock;
|
|
|
|
ret = vb2_queue_init(vb2_q);
|
|
if (ret)
|
|
goto err_destroy;
|
|
|
|
cap->pad.flags = MEDIA_PAD_FL_SINK;
|
|
ret = media_entity_pads_init(&vdev->entity, 1, &cap->pad);
|
|
if (ret)
|
|
goto err_queue_release;
|
|
|
|
ret = video_register_device(vdev, VFL_TYPE_VIDEO, C4_V4L2_VIDEO_BEGIN_NUM);
|
|
if (ret) {
|
|
dev_err(cap->isp->dev,
|
|
"Failed to register %s: %d\n", vdev->name, ret);
|
|
goto err_entity_cleanup;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_entity_cleanup:
|
|
media_entity_cleanup(&vdev->entity);
|
|
err_queue_release:
|
|
vb2_queue_release(vb2_q);
|
|
err_destroy:
|
|
mutex_destroy(&cap->lock);
|
|
return ret;
|
|
}
|
|
|
|
int c4_ipp_caps_register(struct c4_isp_device *isp)
|
|
{
|
|
int ret;
|
|
unsigned int i;
|
|
struct c4_isp_capture *cap;
|
|
|
|
for (i = C4_IPP_CAP_DEV_0; i < C4_IPP_NUM_CAP_DEVS; i++) {
|
|
cap = &isp->ipp_caps[i];
|
|
|
|
cap->sub_frame_num = 1;
|
|
cap->format.pix_mp.width = C4_ISP_DEFAULT_WIDTH;
|
|
cap->format.pix_mp.height = C4_ISP_DEFAULT_HEIGHT;
|
|
cap->format.pix_mp.field = V4L2_FIELD_NONE;
|
|
cap->format.pix_mp.pixelformat = V4L2_PIX_FMT_SRGGB12;
|
|
cap->format.pix_mp.colorspace = V4L2_COLORSPACE_RAW;
|
|
cap->format.info =
|
|
c4_ipp_cap_find_fmt(cap->format.pix_mp.pixelformat);
|
|
|
|
c4_ipp_cap_try_fmt(&cap->format.pix_mp);
|
|
|
|
cap->id = i;
|
|
cap->rsz = NULL;
|
|
cap->isp = isp;
|
|
INIT_LIST_HEAD(&cap->pending);
|
|
spin_lock_init(&cap->buff_lock);
|
|
mutex_init(&cap->lock);
|
|
|
|
ret = c4_ipp_register_cap(cap);
|
|
if (ret) {
|
|
cap->isp = NULL;
|
|
mutex_destroy(&cap->lock);
|
|
c4_ipp_caps_unregister(isp);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void c4_ipp_caps_unregister(struct c4_isp_device *isp)
|
|
{
|
|
struct c4_isp_capture *cap;
|
|
|
|
for (unsigned int i = C4_IPP_CAP_DEV_0; i < C4_IPP_NUM_CAP_DEVS; i++) {
|
|
cap = &isp->ipp_caps[i];
|
|
|
|
if (!cap->isp)
|
|
continue;
|
|
vb2_queue_release(&cap->vb2_q);
|
|
media_entity_cleanup(&cap->vdev.entity);
|
|
video_unregister_device(&cap->vdev);
|
|
mutex_destroy(&cap->lock);
|
|
}
|
|
}
|
|
|
|
void c4_ipp_caps_isr(struct c4_isp_device *isp, enum c4_ipp_cap_devs id)
|
|
{
|
|
struct c4_isp_capture *cap = &isp->ipp_caps[id];
|
|
|
|
if (!cap->vb2_q.streaming)
|
|
return;
|
|
|
|
c4_ipp_cap_done(cap);
|
|
}
|