158 lines
7.9 KiB
C
158 lines
7.9 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLOCK_AMLOGIC_A4_CLKC_H
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#define _DT_BINDINGS_CLOCK_AMLOGIC_A4_CLKC_H
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#define CLKID_GP0_PLL 0
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#define CLKID_HIFI_PLL 1
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#define CLKID_FCLK50M_DIV 2
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#define CLKID_FCLK50M 3
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#define CLKID_FCLK_DIV2_DIV 4
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#define CLKID_FCLK_DIV2 5
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#define CLKID_FCLK_DIV2P5_DIV 6
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#define CLKID_FCLK_DIV2P5 7
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#define CLKID_FCLK_DIV3_DIV 8
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#define CLKID_FCLK_DIV3 9
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#define CLKID_FCLK_DIV4_DIV 10
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#define CLKID_FCLK_DIV4 11
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#define CLKID_FCLK_DIV5_DIV 12
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#define CLKID_FCLK_DIV5 13
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#define CLKID_FCLK_DIV7_DIV 14
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#define CLKID_FCLK_DIV7 15
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#define CLKID_RTC_DUAL_CLKIN 16
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#define CLKID_RTC_DUAL_DIV 17
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#define CLKID_RTC_DUAL_MUX 18
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#define CLKID_RTC_DUAL 19
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#define CLKID_RTC_CLK 20
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#define CLKID_CLK_24M_IN 21
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#define CLKID_CLK_12M_DIV 22
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#define CLKID_CLK_12M 23
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#define CLKID_CLK_25M_DIV 24
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#define CLKID_CLK_25M 25
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#define CLKID_SAR_ADC_MUX 26
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#define CLKID_SAR_ADC_DIV 27
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#define CLKID_SAR_ADC 28
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#define CLKID_PWM_A_MUX 29
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#define CLKID_PWM_A_DIV 30
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#define CLKID_PWM_A 31
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#define CLKID_PWM_B_MUX 32
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#define CLKID_PWM_B_DIV 33
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#define CLKID_PWM_B 34
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#define CLKID_PWM_C_MUX 35
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#define CLKID_PWM_C_DIV 36
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#define CLKID_PWM_C 37
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#define CLKID_PWM_D_MUX 38
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#define CLKID_PWM_D_DIV 39
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#define CLKID_PWM_D 40
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#define CLKID_PWM_E_MUX 41
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#define CLKID_PWM_E_DIV 42
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#define CLKID_PWM_E 43
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#define CLKID_PWM_F_MUX 44
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#define CLKID_PWM_F_DIV 45
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#define CLKID_PWM_F 46
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#define CLKID_PWM_G_MUX 47
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#define CLKID_PWM_G_DIV 48
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#define CLKID_PWM_G 49
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#define CLKID_PWM_H_MUX 50
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#define CLKID_PWM_H_DIV 51
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#define CLKID_PWM_H 52
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#define CLKID_SPICC0_MUX 53
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#define CLKID_SPICC0_DIV 54
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#define CLKID_SPICC0 55
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#define CLKID_SPICC1_MUX 56
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#define CLKID_SPICC1_DIV 57
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#define CLKID_SPICC1 58
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#define CLKID_SD_EMMC_A_MUX 59
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#define CLKID_SD_EMMC_A_DIV 60
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#define CLKID_SD_EMMC_A 61
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#define CLKID_SD_EMMC_C_MUX 62
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#define CLKID_SD_EMMC_C_DIV 63
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#define CLKID_SD_EMMC_C 64
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#define CLKID_ETH_CLK_RMII_MUX 65
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#define CLKID_ETH_CLK_RMII_DIV 66
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#define CLKID_ETH_CLK_RMII 67
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#define CLKID_ETH_CLK125M_DIV 68
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#define CLKID_ETH_CLK125M 69
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#define CLKID_TS_DIV 70
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#define CLKID_TS 71
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#define CLKID_VOUT_MCLK_MUX 72
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#define CLKID_VOUT_MCLK_DIV 73
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#define CLKID_VOUT_MCLK 74
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#define CLKID_VOUT_VENC_MCLK_MUX 75
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#define CLKID_VOUT_VENC_MCLK_DIV 76
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#define CLKID_VOUT_VENC_MCLK 77
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#define CLKID_AUDIO_CORE_MUX 78
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#define CLKID_AUDIO_CORE_DIV 79
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#define CLKID_AUDIO_CORE 80
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#define CLKID_GEN_MUX 81
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#define CLKID_GEN_DIV 82
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#define CLKID_GEN 83
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#define CLKID_SYS_CLK_CTRL 84
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#define CLKID_SYS_RESET_CTRL 85
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#define CLKID_SYS_ANALOG_CTRL 86
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#define CLKID_SYS_PWR_CTRL 87
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#define CLKID_SYS_PAD_CTRL 88
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#define CLKID_SYS_SYS_CTRL 89
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#define CLKID_SYS_TS_PLL 90
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#define CLKID_SYS_DEV_ARB 91
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#define CLKID_SYS_MMC_PCLK 92
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#define CLKID_SYS_CAPU 93
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#define CLKID_SYS_MAILBOX 94
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#define CLKID_SYS_CPU_CTRL 95
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#define CLKID_SYS_JTAG_CTRL 96
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#define CLKID_SYS_IR_CTRL 97
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#define CLKID_SYS_IRQ_CTRL 98
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#define CLKID_SYS_MSR_CLK 99
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#define CLKID_SYS_ROM 100
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#define CLKID_SYS_AOCPU 101
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#define CLKID_SYS_CPU_APB 102
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#define CLKID_SYS_RSA 103
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#define CLKID_SYS_SAR_ADC 104
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#define CLKID_SYS_STARTUP 105
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#define CLKID_SYS_SECURE 106
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#define CLKID_SYS_SPIFC 107
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#define CLKID_SYS_LED_CTRL 108
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#define CLKID_SYS_ETH_PHY 109
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#define CLKID_SYS_ETH_MAC 110
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#define CLKID_SYS_GIC 111
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#define CLKID_SYS_RAMA 112
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#define CLKID_SYS_BIG_NIC 113
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#define CLKID_SYS_RAMB 114
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#define CLKID_SYS_AUDIO_TOP 115
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#define CLKID_SYS_AUDIO_VAD 116
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#define CLKID_SYS_USB 117
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#define CLKID_SYS_SD_EMMC_A 118
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#define CLKID_SYS_SD_EMMC_C 119
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#define CLKID_SYS_PWM_AB 120
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#define CLKID_SYS_PWM_CD 121
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#define CLKID_SYS_PWM_EF 122
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#define CLKID_SYS_PWM_GH 123
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#define CLKID_SYS_SPICC_1 124
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#define CLKID_SYS_SPICC_0 125
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#define CLKID_SYS_UART_A 126
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#define CLKID_SYS_UART_B 127
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#define CLKID_SYS_UART_C 128
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#define CLKID_SYS_UART_D 129
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#define CLKID_SYS_UART_E 130
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#define CLKID_SYS_I2C_M_A 131
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#define CLKID_SYS_I2C_M_B 132
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#define CLKID_SYS_I2C_M_C 133
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#define CLKID_SYS_I2C_M_D 134
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#define CLKID_SYS_RTC 135
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#define CLKID_SYS_VOUT 136
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#define CLKID_SYS_USB_CTRL 137
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#define CLKID_SYS_ACODEC 138
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#define CLKID_AXI_AUDIO_VAD 139
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#define CLKID_AXI_AUDIO_TOP 140
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#define CLKID_AXI_SYS_NIC 141
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#define CLKID_AXI_RAMA 142
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#define CLKID_AXI_CPU_DMC 143
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#define CLKID_AXI_DEV1_DMC 144
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#define CLKID_AXI_DEV0_DMC 145
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#define CLKID_AXI_DSP_DMC 146
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#endif /* _DT_BINDINGS_CLOCK_AMLOGIC_A4_CLKC_H */
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