53 lines
1.5 KiB
C
53 lines
1.5 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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* Copyright (c) 2025 Amlogic, Inc. All rights reserved.
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* Author: Chuan Liu <chuan.liu@amlogic.com>
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*/
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#ifndef __AMLOGIC_A9_SCMI_CLKC_H
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#define __AMLOGIC_A9_SCMI_CLKC_H
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#define CLKID_GP0_PLL_OSC 0
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#define CLKID_GP1_PLL_OSC 1
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#define CLKID_HIFI_PLL_OSC 2
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#define CLKID_GP2_PLL_OSC 3
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#define CLKID_MCLK_PLL_OSC 4
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#define CLKID_FIXED_PLL 5
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#define CLKID_FCLK_50M_PREDIV 6
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#define CLKID_FCLK_50M_DIV 7
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#define CLKID_FCLK_50M 8
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#define CLKID_FCLK_DIV2_DIV 9
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#define CLKID_FCLK_DIV2 10
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#define CLKID_FCLK_DIV2P5_DIV 11
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#define CLKID_FCLK_DIV2P5 12
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#define CLKID_FCLK_DIV3_DIV 13
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#define CLKID_FCLK_DIV3 14
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#define CLKID_FCLK_DIV4_DIV 15
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#define CLKID_FCLK_DIV4 16
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#define CLKID_FCLK_DIV5_DIV 17
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#define CLKID_FCLK_DIV5 18
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#define CLKID_FCLK_DIV7_DIV 19
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#define CLKID_FCLK_DIV7 20
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#define CLKID_SYS_CLK 21
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#define CLKID_SYS_AO_SYS 22
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#define CLKID_SYS_MMC_APB 23
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#define CLKID_SYS_CPU_APB 24
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#define CLKID_SYS_GIC 25
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#define CLKID_AXI_CLK 26
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#define CLKID_AXI_SYS_NIC 27
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#define CLKID_AXI_RAMA 28
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#define CLKID_CPU_CLK 29
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#define CLKID_A78_CLK 30
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#define CLKID_DSU_CLK 31
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#define CLKID_ACLKM 32
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#define CLKID_GP1_PLL 33
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#define CLKID_GP2_PLL 34
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#define CLKID_SYS_PLL_DIV16 35
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#define CLKID_CPU_CLK_DIV16 36
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#define CLKID_A78_CLK_DIV16 37
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#define CLKID_DSU_CLK_DIV16 38
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#define CLKID_GIC_CLK 39
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#define CLKID_RTC_CLK 40
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#endif /* __AMLOGIC_A9_SCMI_CLKC_H */
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