38 lines
1.0 KiB
C
38 lines
1.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __S7D_SCMI_CLKC_H
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#define __S7D_SCMI_CLKC_H
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/*
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* CLKID index values
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*/
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#define CLKID_SCMI_SYS0_PLL_SRC 0
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#define CLKID_SCMI_DDR_PHY 1
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#define CLKID_SCMI_SYS1_PLL_SRC 2
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#define CLKID_SCMI_USB1_PLL_SRC 3
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#define CLKID_SCMI_GP0_PLL_SRC 4
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#define CLKID_SCMI_HDMI_EARC_PLL_SRC 5
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#define CLKID_SCMI_USB0_PHY_GP1_PLL_SRC 6
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#define CLKID_SCMI_USB1_PHY_PLL_SRC 7
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#define CLKID_SCMI_HIFI0_PLL_SRC 8
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#define CLKID_SCMI_USB0_PLL_SRC 9
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#define CLKID_SCMI_ETH_HIFI1_PLL_SRC 10
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#define CLKID_SCMI_FIXED_PLL_SRC 11
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#define CLKID_SCMI_SYS_CLK 12
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#define CLKID_SCMI_AXI_CLK 13
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#define CLKID_SCMI_CPU_CLK 14
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#define CLKID_SCMI_DSU_CLK 15
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#define CLKID_SCMI_FIXED_PLL 16
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#define CLKID_SCMI_GP1_PLL 17
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#define CLKID_SCMI_ACLKM 18
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#define CLKID_SCMI_PWM_G 19
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#define CLKID_SCMI_PWM_H 20
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#define CLKID_SCMI_PWM_I 21
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#define CLKID_SCMI_PWM_J 22
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#endif /* __S7D_CLKC_H */
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