109 lines
2.4 KiB
C
109 lines
2.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef _MESON_DRM_IDS_H_
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#define _MESON_DRM_IDS_H_
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#define OSD1_BLOCK 0
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#define OSD2_BLOCK 1
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#define OSD3_BLOCK 2
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#define OSD4_BLOCK 3
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#define OSD5_BLOCK 4
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#define AFBC_OSD1_BLOCK 5
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#define AFBC_OSD2_BLOCK 6
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#define AFBC_OSD3_BLOCK 7
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#define AFBC1_BLOCK 5
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#define AFBC2_BLOCK 6
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#define AFBC3_BLOCK 7
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#define GFCD_BLOCK 8
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#define GFCD2_BLOCK 9
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#define SCALER_OSD1_BLOCK 10
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#define SCALER_OSD2_BLOCK 11
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#define SCALER_OSD3_BLOCK 12
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#define SCALER_OSD4_BLOCK 13
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#define SCALER_OSD5_BLOCK 14
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#define SCALER1_BLOCK 10
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#define SCALER2_BLOCK 11
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#define SCALER3_BLOCK 12
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#define SCALER4_BLOCK 13
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#define SCALER5_BLOCK 14
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#define OSD_BLEND_BLOCK 15
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#define OSD2_BLEND_BLOCK 16
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#define OSD1_HDR_BLOCK 17
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#define HDR1_BLOCK 17
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#define HDR2_BLOCK 18
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#define VPP_POSTBLEND_BLOCK 19
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#define VPP1_POSTBLEND_BLOCK 19
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#define VPP2_POSTBLEND_BLOCK 20
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#define VPP3_POSTBLEND_BLOCK 21
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#define VIDEO1_BLOCK 22
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#define VIDEO2_BLOCK 23
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#define VIDEO3_BLOCK 24
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#define VIU2_OSD1_BLOCK 25
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#define VPP2_BLOCK 26
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#define HDR3_BLOCK 27
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#define SLICE2PPC_BLOCK 28
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#define BLEND_CSC_BLOCK 29
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#define BLOCK_ID_MAX 32
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#define BLEND_D0_CSC_BLOCK 25
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#define OSD1_PORT 0
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#define OSD2_PORT 1
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#define OSD3_PORT 2
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#define AFBC_OSD1_PORT 3
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#define AFBC_OSD2_PORT 4
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#define AFBC_OSD3_PORT 5
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#define SCALER_OSD1_PORT 6
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#define SCALER_OSD2_PORT 7
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#define SCALER_OSD3_PORT 8
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#define OSDBLEND_DIN1_PORT 9
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#define OSDBLEND_DIN2_PORT 10
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#define OSDBLEND_DIN3_PORT 11
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#define OSDBLEND_DOUT1_PORT 12
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#define OSDBLEND_DOUT2_PORT 13
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#define OSD1_HDR_PORT 14
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#define OSD1_DOLBY_PORT 15
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#define VPP_POSTBLEND_OSD1_IN_PORT 16
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#define VPP_POSTBLEND_OSD2_IN_PORT 17
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#define VPP_POSTBLEND_OUT_PORT 18
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#define VIDEO1_PORT 19
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#define VIDEO2_PORT 20
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/*
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* vpu block type
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*
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*/
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/*
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*#define MESON_BLK_OSD 0
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*#define MESON_BLK_AFBC 1
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*#define MESON_BLK_SCALER 2
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*#define MESON_BLK_OSDBLEND 3
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*#define MESON_BLK_HDR 4
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*#define MESON_BLK_DOVI 5
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*#define MESON_BLK_VPPBLEND 6
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*#define MESON_BLK_VIDEO 7
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*#define MESON_BLK_SLICE2PPC 8
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*/
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/*
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*OSD VERSION
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*V1:G12A
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*V2:G12B-revA:base G12A,add repeate last line function
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*V3:G12B-RevB:add line interrupt support
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*V4:TL1:base G12A,fix shift issue,delete osd3
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*V5:SM1:base G12A,fix shift issue
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*V6:TM2,base G12A,fix shift issue,add mux for osd1-sr
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*/
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#define OSD_V1 1
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#define OSD_V2 2
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#define OSD_V3 3
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#define OSD_V4 4
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#define OSD_V5 5
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#define OSD_V6 6
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#define OSD_V7 7
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#endif
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