91 lines
2.4 KiB
C
91 lines
2.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __TM2_MBOX_H__
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#define __TM2_MBOX_H__
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#include "amlogic,mbox.h"
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/* MAILBOX DRIVER ID */
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/* ARMREE to AOCPU driver ID */
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#define TM2_REE2AO0 64
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#define TM2_REE2AO1 65
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#define TM2_REE2AO2 66
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#define TM2_REE2AO3 67
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#define TM2_REE2AO4 68
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#define TM2_REE2AO5 69
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#define TM2_REE2AO6 70
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#define TM2_REE2AO7 71
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#define TM2_REE2AO8 72
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#define TM2_REE2AO9 73
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#define TM2_REE2AO10 74
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/* DSPA to ARMREE driver ID */
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#define TM2_DSPA2REE0 129
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#define TM2_DSPA2REE1 130
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#define TM2_DSPA2REE2 131
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#define TM2_DSPA2REE3 132
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#define TM2_DSPA2REE4 133
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/* ARMREE to DSPA driver ID */
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#define TM2_REE2DSPA0 161
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#define TM2_REE2DSPA1 162
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#define TM2_REE2DSPA2 163
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#define TM2_REE2DSPA3 164
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#define TM2_REE2DSPA4 165
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/* DSPB to ARMREE driver ID */
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#define TM2_DSPB2REE0 145
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#define TM2_DSPB2REE1 146
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#define TM2_DSPB2REE2 147
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#define TM2_DSPB2REE3 148
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#define TM2_DSPB2REE4 149
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/* ARMREE to DSPA driver ID */
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#define TM2_REE2DSPB0 177
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#define TM2_REE2DSPB1 178
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#define TM2_REE2DSPB2 179
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#define TM2_REE2DSPB3 180
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#define TM2_REE2DSPB4 181
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/* MBOX CLIENT ID */
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/* ARMREE to AOCPU client ID */
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#define TM2_REE2AO_DEV TM2_REE2AO0
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#define TM2_REE2AO_VRTC TM2_REE2AO1
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#define TM2_REE2AO_HIFI4DSPA TM2_REE2AO2
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#define TM2_REE2AO_HIFI4DSPB TM2_REE2AO3
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#define TM2_REE2AO_AOCEC TM2_REE2AO4
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#define TM2_REE2AO_LED TM2_REE2AO5
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#define TM2_REE2AO_ETH TM2_REE2AO6
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/* ARMREE to DSPA client ID */
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#define TM2_REE2DSPA_DEV TM2_REE2DSPA0
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#define TM2_REE2DSPA_DSP TM2_REE2DSPA1
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#define TM2_REE2DSPA_AUDIO TM2_REE2DSPA2
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/* DSPA to ARMREE client ID */
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#define TM2_DSPA2REE_DEV TM2_DSPA2REE0
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/* ARMREE to DSPB client ID */
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#define TM2_REE2DSPB_DEV TM2_REE2DSPB0
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#define TM2_REE2DSPB_DSP TM2_REE2DSPB1
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#define TM2_REE2DSPB_AUDIO TM2_REE2DSPB2
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/* DSPB to ARMREE client ID */
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#define TM2_DSPB2REE_DEV TM2_DSPB2REE0
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/* MBOX CHANNEL ID */
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#define TM2_MBOX_REE2AO_LOW 0
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#define TM2_MBOX_REE2AO_HIGH 1
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#define TM2_MBOX_PL0_NUMS 2
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#define TM2_MBOX_REE2DSPA 0
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#define TM2_MBOX_DSPA2REE 1
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#define TM2_MBOX_REE2DSPB 2
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#define TM2_MBOX_DSPB2REE 3
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#define TM2_MBOX_PL1_NUMS 4
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#endif /* __TM2_MBOX_H__ */
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