43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#define PDID_C5_USB2 0
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#define PDID_C5_USB3 1
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#define PDID_C5_DOS_HCODEC 2
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#define PDID_C5_DOS_HEVC 3
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#define PDID_C5_TAHOE 4
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#define PDID_C5_VPU_VOUT 5
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#define PDID_C5_SD_EMMC_A 6
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#define PDID_C5_SD_EMMC_B 7
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#define PDID_C5_SD_EMMC_C 8
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#define PDID_C5_ETH 9
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#define PDID_C5_NNA3 10
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#define PDID_C5_NNA2 11
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#define PDID_C5_AMFC 12
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#define PDID_C5_ISP 13
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#define PDID_C5_GE2D 14
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#define PDID_C5_CVE 15
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#define PDID_C5_DEWARP 16
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#define PDID_C5_AI_ISP 17
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#define PDID_C5_DSI 18
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#define PDID_C5_PCIE 19
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#define PDID_C5_U3P2_COMP 20
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#define PDID_C5_AO_SED 21
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#define PDID_C5_AO_ISP 22
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#define PDID_C5_AO_SPI 23
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#define PDID_C5_AO_UART_A 24
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#define PDID_C5_AO_UART_B 25
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#define PDID_C5_AO_SPISG 26
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#define PDID_C5_AO_I2C_A 27
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#define PDID_C5_AO_I2C_B 28
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#define PDID_C5_AO_I3C 29
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#define PDID_C5_AO_IR 30
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#define PDID_C5_AO_PWM_A 31
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#define PDID_C5_AO_PWM_B 32
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#define PDID_C5_AO_PSRAM 33
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#define PDID_C5_AUDIO_TOP 34
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#define PDID_C5_CAN0 35
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#define PDID_C5_CAN1 36
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