78 lines
2.3 KiB
Diff
78 lines
2.3 KiB
Diff
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From fa2b54ccd9a5cc851668b4af7134abdf764f15db Mon Sep 17 00:00:00 2001
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From: yang.li3 <yang.li3@unisoc.com>
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Date: Fri, 26 Jun 2026 11:58:17 +0800
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Subject: [PATCH] Bug #11111113 - mipi转HDMI调试
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[root cause ]:mipi转HDMI调试
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[changes ]:mipi转HDMI调试
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[side effects]:na
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[self test ]:pass
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[download normally]:pass
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[power on/off normally]:pass
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[do common repository/branch inspection]:na
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[is there dependence]:na
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[confirm dependent commit]:na
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[board]:na
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[test case]:na
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[reviewers]:na
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commit_template_version:v1
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Change-Id: I7fc0e6ece8628c6e0c79d3c91b9a7acf78589a1c
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Signed-off-by: yang.li3 <yang.li3@unisoc.com>
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---
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diff --git a/recipes-kernel/linux/linux-unisoc-5.4.bb b/recipes-kernel/linux/linux-unisoc-5.4.bb
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index 3f85602..633d231 100755
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--- a/recipes-kernel/linux/linux-unisoc-5.4.bb
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+++ b/recipes-kernel/linux/linux-unisoc-5.4.bb
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@@ -24,6 +24,7 @@
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file://kernel-config/8021q_vlan.cfg \
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${KERNEL_MACHINE_PATCH} \
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${@bb.utils.contains('USERDEBUG', 'userdebug', 'file://userdebug.cfg', 'file://user.cfg', d)} \
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+ file://enable-8912.cfg \
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"
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PV = "5.4"
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diff --git a/recipes-kernel/linux/linux-unisoc-5.4/uis7885/enable-8912.cfg b/recipes-kernel/linux/linux-unisoc-5.4/uis7885/enable-8912.cfg
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new file mode 100644
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index 0000000..968a628
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--- /dev/null
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+++ b/recipes-kernel/linux/linux-unisoc-5.4/uis7885/enable-8912.cfg
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@@ -0,0 +1 @@
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+CONFIG_LT8912B=y
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diff --git a/recipes-kernel/linux/linux-unisoc-5.4/uis7885/uis7885-2h10-overlay.dts b/recipes-kernel/linux/linux-unisoc-5.4/uis7885/uis7885-2h10-overlay.dts
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index 94a1359..91e1a63 100755
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--- a/recipes-kernel/linux/linux-unisoc-5.4/uis7885/uis7885-2h10-overlay.dts
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+++ b/recipes-kernel/linux/linux-unisoc-5.4/uis7885/uis7885-2h10-overlay.dts
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@@ -731,6 +731,29 @@
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};
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};
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+&i2c2 {
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+ status = "okay";
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+ clock-frequency = <400000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ lt8912b: lt8912b@48 {
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+ compatible = "lontium,lt8912b";
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+ reg = <0x48>;
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+ /*power-gpios = <&ap_gpio 22 GPIO_ACTIVE_HIGH>;*/
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+ reset-gpios = <&ap_gpio 11 GPIO_ACTIVE_HIGH>;
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+ interrupt-gpios = <&ap_gpio 132 GPIO_ACTIVE_HIGH>;
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+
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+ lt8912b_addr_1: lt8912b_addr_1@49 {
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+ addr_1_reg = /bits/ 8 <0x49>;
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+ };
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+
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+ lt8912b_addr_2: lt8912b_addr_2@4a {
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+ addr_2_reg = /bits/ 8 <0x4a>;
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+ };
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+ };
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+};
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+
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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