适配新七寸屏
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+16
-4
@@ -10,6 +10,7 @@
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__overlay__ {
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lcds {
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lcd_jd9365_mipi_wxga: lcd_jd9365_mipi_wxga {
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/* Match the U-Boot handoff and the stable Unisoc burst path. */
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sprd,dsi-work-mode = <1>;
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sprd,dsi-lane-number = <4>;
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sprd,dsi-color-format = "rgb888";
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@@ -26,7 +27,13 @@
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sprd,reset-on-sequence = <1 5>, <0 10>, <1 120>;
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sprd,reset-off-sequence = <0 20>;
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sprd,use-dcs-write;
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/*
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* The vendor register table uses packet type 0x23
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* (generic short write, two parameters). Do not set
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* sprd,use-dcs-write here: that makes the panel driver
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* recode every entry as a DCS packet and the JD9365
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* vendor-page registers are then not programmed.
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*/
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sprd,initial-command = [
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23 00 00 02 E0 00
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23 00 00 02 E1 93
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@@ -241,13 +248,18 @@
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native-mode = <&jd9365_timing0>;
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jd9365_timing0: timing0 {
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clock-frequency = <67750800>;
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clock-frequency = <64000000>;
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hactive = <800>;
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vactive = <1280>;
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hback-porch = <20>;
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hfront-porch = <20>;
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vback-porch = <8>;
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vfront-porch = <17>;
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/*
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* DPU r6p0 requires vsync + vback-porch >= 32.
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* Keep the 25-line total blanking unchanged while
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* matching the visually clean U-Boot handoff.
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*/
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vback-porch = <24>;
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vfront-porch = <1>;
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hsync-len = <20>;
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vsync-len = <8>;
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};
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+3
-3
@@ -8,7 +8,7 @@
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//#include "lcd/lcd_g40396_truly_mipi_fhd.dtsi"
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//#include "lcd/lcd_nt36672e_truly_mipi_fhd_nodsc.dtsi"
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#include "lcd/lcd_lt8912b_mipi_hdmi_1080p.dtsi"
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#include "lcd/lcd_ili9881c_truly_mipi_wxga.dtsi"
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#include "lcd/lcd_jd9365_mipi_wxga.dtsi"
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#include "tp/ums9620-tp.dtsi"
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#include <dt-bindings/mfd/sprd,ump9620-regs.h>
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#include <dt-bindings/mfd/sprd,ump9620-mask.h>
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@@ -594,7 +594,7 @@
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sprd,backlight = <&pwm_backlight>;
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avdd-gpio = <&ap_gpio 153 GPIO_ACTIVE_HIGH>;
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avee-gpio = <&ap_gpio 178 GPIO_ACTIVE_HIGH>;
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iovdd-gpio = <&ap_gpio 187 GPIO_ACTIVE_HIGH>;
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/* GPIO187 is kept high by the shared hdmi_5v_en gpio-hog above. */
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reset-gpio = <&ap_gpio 152 GPIO_ACTIVE_HIGH>;
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};
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@@ -604,7 +604,7 @@
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};
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&lcd_ili9881c_truly_mipi_wxga {
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&lcd_jd9365_mipi_wxga {
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sprd,sr-width = <800>;
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sprd,sr-height = <1280>;
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};
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